Design of energy efficient logic gates using CNTFET

One of the major downsides of traditional Metal Oxide Silicon Field Effect Transistor (MOSFET) is scaling which hinders designing of energy efficient devices; to get over this constraint Carbon Nano Tube Field Effect Transistor (CNTFET) is used. This paper presents the designing of energy efficient...

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Hauptverfasser: Mohanta, Nikita, Yadav, Prashant, Rani, Jyoti
Format: Tagungsbericht
Sprache:eng
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Zusammenfassung:One of the major downsides of traditional Metal Oxide Silicon Field Effect Transistor (MOSFET) is scaling which hinders designing of energy efficient devices; to get over this constraint Carbon Nano Tube Field Effect Transistor (CNTFET) is used. This paper presents the designing of energy efficient logic gates using CNTFET. The structure of CNTFET is almost similar to that of MOSFET except it comprises of single or group of nanotubes as the channel material. Using Stanford CNTFET model, designing of CNTFET based logic gates are manifested. For design and simulation HSPICE software is used in accordance of Stanford CNTFET model. Power consumption and delay of logic gates are observed, while changing the operating voltage keeping temperature constant. Figure of Merit (FOM) is computed by replacing MOSFET with CNTFET.
ISSN:0094-243X
1551-7616
DOI:10.1063/5.0053368