Improvements in 2D p-type WSe 2 transistors towards ultimate CMOS scaling

This paper provides comprehensive experimental analysis relating to improvements in the two-dimensional (2D) p-type metal-oxide-semiconductor (PMOS) field effect transistors (FETs) by pure van der Waals (vdW) contacts on few-layer tungsten diselenide (WSe ) with high-k metal gate (HKMG) stacks. Our...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:Scientific reports 2023-02, Vol.13 (1), p.3304
Hauptverfasser: Patoary, Naim Hossain, Xie, Jing, Zhou, Guantong, Al Mamun, Fahad, Sayyad, Mohammed, Tongay, Sefaattin, Esqueda, Ivan Sanchez
Format: Artikel
Sprache:eng
Online-Zugang:Volltext
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:This paper provides comprehensive experimental analysis relating to improvements in the two-dimensional (2D) p-type metal-oxide-semiconductor (PMOS) field effect transistors (FETs) by pure van der Waals (vdW) contacts on few-layer tungsten diselenide (WSe ) with high-k metal gate (HKMG) stacks. Our analysis shows that standard metallization techniques (e.g., e-beam evaporation at moderate pressure ~ 10  torr) results in significant Fermi-level pinning, but Schottky barrier heights (SBH) remain small (
ISSN:2045-2322
DOI:10.1038/s41598-023-30317-4