Energy-Efficient Neuron, Synapse and STDP Integrated Circuits

Energy-Efficient Neuron, Synapse and STDP Integrated Circuits

Ultra-low energy biologically-inspired neuron and synapse integrated circuits are presented. The synapse includes a spike timing dependent plasticity (STDP) learning rule circuit. These circuits have been designed, fabricated and tested using a 90 nm CMOS process. Experimental measurements demonstra...

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Veröffentlicht in:IEEE transactions on biomedical circuits and systems 2012-06, Vol.6 (3), p.246-256
Hauptverfasser: Cruz-Albrecht, J. M., Yung, M. W., Srinivasa, N.
Format: Artikel
Sprache:eng
Schlagworte:
Biomedical Engineering
Brain
Brain - physiology
Capacitors
Circuits
CMOS
Computers
Electrodes, Implanted
Electronics
energy
Equipment Design
Humans
Integrated circuit modeling
Integrated circuits
Learning
low power electronics
Models, Neurological
Neural Networks (Computer)
Neurons
Neurons - physiology
Plasticity
Prostheses and Implants
Signal Processing, Computer-Assisted
spike timing dependent plasticity (STDP)
Spikes
Synapses
Synapses - physiology
Synaptic Transmission - physiology
Timing
Transconductance
Transistors
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Beschreibung
Zusammenfassung:Ultra-low energy biologically-inspired neuron and synapse integrated circuits are presented. The synapse includes a spike timing dependent plasticity (STDP) learning rule circuit. These circuits have been designed, fabricated and tested using a 90 nm CMOS process. Experimental measurements demonstrate proper operation. The neuron and the synapse with STDP circuits have an energy consumption of around 0.4 pJ per spike and synaptic operation respectively.
ISSN:1932-4545
1940-9990
DOI:10.1109/TBCAS.2011.2174152