The right technique yields critical Direct Rambus signal-integrity measurements

Over the last 10 years, processor architectures have done a remarkable job of increasing CPU performance. However, main-memory subsystems have not kept pace with the blistering speeds of the muP clocks. Although improved and more sophisticated caches have partially bridged this gap, data-intensive images are demanding even more performance directly from the memory system. A significant development has recently changed the computer's system architecture to solve this problem. Direct Rambus is a 2-byte-wide high-speed digital bus that double-pumps a 400-MHz clock to enable data transfer on both the rising and the falling clock edges. Assuming 100% use of the data bus, the peak bandwidth is 1.6 Gbytes/sec. The traditional logic-analysis- measurement techniques need to be complemented with a signal-integrity-measurement tool. Time-domain reflectometry is the tool of choice for digital-design engineers.