Utility clock-generator board serves telecom lab applications

A second ZL30406 (U6) converts one of the C19o output clocks into a very low-jitter differential CML output clock, selectable as one of four frequency multiples (19.44 MHz, 38.88MHz, 77.76 MHz, and 155.52 MHz). UIl is a hardware-configurable differential clock frequency divider, which can be program...

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Veröffentlicht in:	Electronic Design 2005-08, Vol.53 (18), p.74
1. Verfasser:	Byers, Russ
Format:	Magazinearticle
Sprache:	eng
Schlagworte:	Bandwidths Circuit design Clocks & watches Electric noise Electronic design automation Forecasts and trends Generators Phase-locked loops Printed circuit boards Product development Semiconductor industry Signal generators Telecommunications
Online-Zugang:	Volltext
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Beschreibung
Zusammenfassung:	A second ZL30406 (U6) converts one of the C19o output clocks into a very low-jitter differential CML output clock, selectable as one of four frequency multiples (19.44 MHz, 38.88MHz, 77.76 MHz, and 155.52 MHz). UIl is a hardware-configurable differential clock frequency divider, which can be programmed using DIP switches to divide the ZL30407 chip's 155-MHz low-voltage differential signaling output clock down by 1, 2, 4,8, or 16 in frequency.
ISSN:	0013-4872 1944-9550