Antifuse memory IP fuels low-power designs
EMBEDDED NONVOLATILE MEMORY is becoming more prevalent in a wide range of chips, particularly for power-sensitive applications. Memory IP for such apps requires the design of both the basic memory bit and the memory macro architecture to minimize power demands. An appropriate one-time programmable (...
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Veröffentlicht in: | Electronic Engineering Times 2008-08 (1537), p.70 |
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Format: | Magazinearticle |
Sprache: | eng |
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Online-Zugang: | Volltext |
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Zusammenfassung: | EMBEDDED NONVOLATILE MEMORY is becoming more prevalent in a wide range of chips, particularly for power-sensitive applications. Memory IP for such apps requires the design of both the basic memory bit and the memory macro architecture to minimize power demands. An appropriate one-time programmable (OTP) memory macro can meet nonvolatile memory requirements while offering low-power operation. |
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ISSN: | 0192-1541 |