Photonic ADC: overcoming the bottleneck of electronic jitter

Accurate conversion of wideband multi-GHz analog signals into the digital domain has long been a target of analog-to-digital converter (ADC) developers, driven by applications in radar systems, software radio, medical imaging, and communication systems. Aperture jitter has been a major bottleneck on...

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Veröffentlicht in:Optics express 2012-02, Vol.20 (4), p.4454-4469
Hauptverfasser: Khilo, Anatol, Spector, Steven J, Grein, Matthew E, Nejadmalayeri, Amir H, Holzwarth, Charles W, Sander, Michelle Y, Dahlem, Marcus S, Peng, Michael Y, Geis, Michael W, DiLello, Nicole A, Yoon, Jung U, Motamedi, Ali, Orcutt, Jason S, Wang, Jade P, Sorace-Agaskar, Cheryl M, Popović, Miloš A, Sun, Jie, Zhou, Gui-Rong, Byun, Hyunil, Chen, Jian, Hoyt, Judy L, Smith, Henry I, Ram, Rajeev J, Perrott, Michael, Lyszczarz, Theodore M, Ippen, Erich P, Kärtner, Franz X
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Sprache:eng
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Zusammenfassung:Accurate conversion of wideband multi-GHz analog signals into the digital domain has long been a target of analog-to-digital converter (ADC) developers, driven by applications in radar systems, software radio, medical imaging, and communication systems. Aperture jitter has been a major bottleneck on the way towards higher speeds and better accuracy. Photonic ADCs, which perform sampling using ultra-stable optical pulse trains generated by mode-locked lasers, have been investigated for many years as a promising approach to overcome the jitter problem and bring ADC performance to new levels. This work demonstrates that the photonic approach can deliver on its promise by digitizing a 41 GHz signal with 7.0 effective bits using a photonic ADC built from discrete components. This accuracy corresponds to a timing jitter of 15 fs - a 4-5 times improvement over the performance of the best electronic ADCs which exist today. On the way towards an integrated photonic ADC, a silicon photonic chip with core photonic components was fabricated and used to digitize a 10 GHz signal with 3.5 effective bits. In these experiments, two wavelength channels were implemented, providing the overall sampling rate of 2.1 GSa/s. To show that photonic ADCs with larger channel counts are possible, a dual 20-channel silicon filter bank has been demonstrated.
ISSN:1094-4087
1094-4087
DOI:10.1364/OE.20.004454