5.5-V I/O in a 2.5-V 0.25-μm CMOS technology

5.5-V I/O in a 2.5-V 0.25-μm CMOS technology

A robust high-voltage-tolerant I/O that does not need process options is presented, demonstrated on 5.5-V-tolerant I/O in a 2.5-V 0.25- mu m CMOS technology. Circuit techniques limit oxide stress and hot-carrier degradation. Measurements on realized circuits, under accelerated stress conditions, ind...

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Veröffentlicht in:IEEE journal of solid-state circuits 2001-03, Vol.36 (3), p.528-538
Hauptverfasser: Annema, A.-J., Geelen, G.J.G.M., de Jong, P.C.
Format: Artikel
Sprache:eng
Schlagworte:
Circuits
CMOS
Electric potential
Extrapolation
Oxides
Stresses
Swing
Voltage
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Zusammenfassung:A robust high-voltage-tolerant I/O that does not need process options is presented, demonstrated on 5.5-V-tolerant I/O in a 2.5-V 0.25- mu m CMOS technology. Circuit techniques limit oxide stress and hot-carrier degradation. Measurements on realized circuits, under accelerated stress conditions, indicate an extrapolated lifetime of hundreds of years for 5.5-V pad voltage swing, 2.2-V supply voltage. The shown concepts can easily be scaled toward newer processes or other interfacing voltages.
ISSN:0018-9200
DOI:10.1109/4.910493