A multigigabit DRAM technology with 6F super(2) open-bitline cell, distributed overdriven sensing, and stacked-flash fuse

A multigigabit DRAM technology with 6F super(2) open-bitline cell, distributed overdriven sensing, and stacked-flash fuse

A multigigabit DRAM technology was developed that features a low-noise 6F super(2) open-bitline cell with fully utilized edge arrays, distributed overdriven sensing for operation below 1 V, and a highly reliable post-packaging repair scheme using a stacked-flash fuse. This technology, which can be u...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:IEEE journal of solid-state circuits 2001-01, Vol.36 (11)
Hauptverfasser: Takahashi, T, Sekiguchi, T, Takemura, R, Narui, S, Fujisawa, H, Miyatake, S, Morino, M, Arai, K, Yamada, S, Shukuri, S, Nakamura, M, Tadaki, Y, Kajigaya, K, Kimura, K, Itoh, K
Format: Artikel
Sprache:eng
Schlagworte:
Arrays
Chip formation
Circuits
Detection
Dynamic random access memory
Fuses
Packages
Repair
Online-Zugang:Volltext
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:A multigigabit DRAM technology was developed that features a low-noise 6F super(2) open-bitline cell with fully utilized edge arrays, distributed overdriven sensing for operation below 1 V, and a highly reliable post-packaging repair scheme using a stacked-flash fuse. This technology, which can be used to fabricate a 0,13- mu m 180-mm super(2) 1-Gb DRAM assembled in a 400-mil package, was verified using a 57.6-mm super(2), 200-MHz array-cycle, 256-Mb test chip with 0.109- mu m super(2) cells
ISSN:0018-9200
DOI:10.1109/4.962294