Closed-form breakdown voltage model for PD SOI NMOS devices considering impact ionization of both parasitic BJT and surface MOS channel simultaneously

This paper reports a compact breakdown voltage model for partially depleted (PD) silicon-on-insulator (SOI) n-metal-oxide-semiconductor (NMOS) devices considering BJT/MOS impact ionization. Via the improved current conduction model considering BJT/MOS impact ionization this compact model provides an...

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Veröffentlicht in:IEEE transactions on electron devices 2002-11, Vol.49 (11), p.2016-2023
Hauptverfasser: Shih-Chia Lin, Kuo, J.B.
Format: Artikel
Sprache:eng
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Zusammenfassung:This paper reports a compact breakdown voltage model for partially depleted (PD) silicon-on-insulator (SOI) n-metal-oxide-semiconductor (NMOS) devices considering BJT/MOS impact ionization. Via the improved current conduction model considering BJT/MOS impact ionization this compact model provides an accurate prediction of the breakdown behavior of the PD SOI NMOS devices as verified by the experimental data and the MEDICI results. Based on the analytical model, when the gate voltage is lowered, the breakdown voltage decreases due to a stronger function of the parasitic BJT. In the subthreshold region, the breakdown voltage increases at a decreased gate voltage due to a weaker function of the parasitic BJT.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2002.804728