Electron and hole mobility enhancement in strained SOI by wafer bonding

Electron and hole mobility enhancement in strained SOI by wafer bonding

N- and p-MOSFETs have been fabricated in strained Si-on-SiGe-on-insulator (SSOI) with high (15-25%) Ge content. Wafer bonding and H-induced layer transfer techniques enabled the fabrication of the high Ge content SiGe-on-insulator (SGOI) substrates. Mobility enhancement of 50% for electrons (with 15...

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Veröffentlicht in:IEEE transactions on electron devices 2002-09, Vol.49 (9), p.1566-1571
Hauptverfasser: Lijuan Huang, Chu, J.O., Goma, S.A., D'Emic, C.P., Koester, S.J., Canaperi, D.F., Mooney, P.M., Cordes, S.A., Speidell, J.L., Anderson, R.M., Wong, H.-S.P.
Format: Artikel
Sprache:eng
Schlagworte:
Bonding
Charge carrier mobility
CMOS integrated circuits
Devices
Germanium
Germanium alloys
Hole mobility
MOSFETs
Semiconductor materials
Silicon
Silicon alloys
Silicon germanides
Silicon on insulator technology
Silicon substrates
Wafer bonding
Wafers
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Zusammenfassung:N- and p-MOSFETs have been fabricated in strained Si-on-SiGe-on-insulator (SSOI) with high (15-25%) Ge content. Wafer bonding and H-induced layer transfer techniques enabled the fabrication of the high Ge content SiGe-on-insulator (SGOI) substrates. Mobility enhancement of 50% for electrons (with 15% Ge) and 15-20% for holes (with 20-25% Ge) has been demonstrated in SSOI MOSFETs. These mobility enhancements are commensurate with those reported for FETs fabricated on strained silicon on bulk SiGe substrates.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2002.802675