A Simple Series Resistance Extraction Methodology for Advanced CMOS Devices
Series resistance has become a serious obstacle inhibiting the performance of advanced CMOS devices. However, series resistance quantification in these same advanced CMOS devices is becoming exceedingly difficult. In this letter, we demonstrate a very simple series resistance extraction procedure wh...
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| Veröffentlicht in: | IEEE electron device letters 2011-08, Vol.32 (8), p.1047-1049 |
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| container_end_page | 1049 |
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| container_issue | 8 |
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| container_title | IEEE electron device letters |
| container_volume | 32 |
| creator | Campbell, J. P. Cheung, K. P. Suehle, J. S. Oates, A. |
| description | Series resistance has become a serious obstacle inhibiting the performance of advanced CMOS devices. However, series resistance quantification in these same advanced CMOS devices is becoming exceedingly difficult. In this letter, we demonstrate a very simple series resistance extraction procedure which is derived only from the ratio of two linear ID - VG measurements. This approach has a verifiable accuracy check and is successfully used to extract the series resistance from several advanced devices. Furthermore, the validity of the assumptions used in this series resistance extraction procedure is examined and shown to be justified. In an attempt to further test the validity of this technique, several known external resistors were inserted in series with the device under test. The series resistance extraction procedure faithfully reproduces these known external resistances to within ±10%. |
| doi_str_mv | 10.1109/LED.2011.2158183 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_proquest_miscellaneous_907937131</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>5934358</ieee_id><sourcerecordid>907937131</sourcerecordid><originalsourceid>FETCH-LOGICAL-c352t-58bc73f99713d2bc63c62c1ad57220199cf2563b0f6760e45e65654b42a735d83</originalsourceid><addsrcrecordid>eNpdkE1rGzEQQEVJIU7Se6AXUQg5raPRx2p1NI7TltoY6uQsZO1sq7C2XGkdmn8fGZscctJh3jxGj5BrYGMAZu7ms_sxZwBjDqqBRnwiI1CqqZiqxRkZMS2hEsDqc3KR8zNjIKWWI_JrQldhs-uRrjAFzPQ35pAHt_VIZ_-H5PwQ4pYucPgb29jHP6-0i4lO2pcD0tLpYrmi9_gSPOYr8rlzfcYvp_eSPD3MHqc_qvny-8_pZF55ofhQqWbtteiM0SBavva18DX34FqlefmBMb7j5eg162pdM5QKa1UruZbcaaHaRlyS26N3l-K_PebBbkL22Pdui3GfrWHaiCKHQn77QD7HfdqW46yBIm0k0wViR8inmHPCzu5S2Lj0aoHZQ1tb2tpDW3tqW1ZuTl6Xveu7VGKE_L7HpQRl-EH99cgFRHwfKyOkUI14A0gFfzE</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>915658407</pqid></control><display><type>article</type><title>A Simple Series Resistance Extraction Methodology for Advanced CMOS Devices</title><source>IEEE Electronic Library (IEL)</source><creator>Campbell, J. P. ; Cheung, K. P. ; Suehle, J. S. ; Oates, A.</creator><creatorcontrib>Campbell, J. P. ; Cheung, K. P. ; Suehle, J. S. ; Oates, A.</creatorcontrib><description>Series resistance has become a serious obstacle inhibiting the performance of advanced CMOS devices. However, series resistance quantification in these same advanced CMOS devices is becoming exceedingly difficult. In this letter, we demonstrate a very simple series resistance extraction procedure which is derived only from the ratio of two linear ID - VG measurements. This approach has a verifiable accuracy check and is successfully used to extract the series resistance from several advanced devices. Furthermore, the validity of the assumptions used in this series resistance extraction procedure is examined and shown to be justified. In an attempt to further test the validity of this technique, several known external resistors were inserted in series with the device under test. The series resistance extraction procedure faithfully reproduces these known external resistances to within ±10%.</description><identifier>ISSN: 0741-3106</identifier><identifier>EISSN: 1558-0563</identifier><identifier>DOI: 10.1109/LED.2011.2158183</identifier><identifier>CODEN: EDLEDZ</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Accuracy ; Applied sciences ; CMOS ; CMOS integrated circuits ; Design. Technologies. Operation analysis. Testing ; Devices ; Electronic equipment and fabrication. Passive components, printed wiring boards, connectics ; Electronics ; Exact sciences and technology ; Extraction ; Integrated circuits ; Logic gates ; Methodology ; MOSFET circuits ; MOSFETs ; Obstacles ; Resistance ; Resistors ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Series resistance</subject><ispartof>IEEE electron device letters, 2011-08, Vol.32 (8), p.1047-1049</ispartof><rights>2015 INIST-CNRS</rights><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Aug 2011</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c352t-58bc73f99713d2bc63c62c1ad57220199cf2563b0f6760e45e65654b42a735d83</citedby><cites>FETCH-LOGICAL-c352t-58bc73f99713d2bc63c62c1ad57220199cf2563b0f6760e45e65654b42a735d83</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5934358$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5934358$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=24415927$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Campbell, J. P.</creatorcontrib><creatorcontrib>Cheung, K. P.</creatorcontrib><creatorcontrib>Suehle, J. S.</creatorcontrib><creatorcontrib>Oates, A.</creatorcontrib><title>A Simple Series Resistance Extraction Methodology for Advanced CMOS Devices</title><title>IEEE electron device letters</title><addtitle>LED</addtitle><description>Series resistance has become a serious obstacle inhibiting the performance of advanced CMOS devices. However, series resistance quantification in these same advanced CMOS devices is becoming exceedingly difficult. In this letter, we demonstrate a very simple series resistance extraction procedure which is derived only from the ratio of two linear ID - VG measurements. This approach has a verifiable accuracy check and is successfully used to extract the series resistance from several advanced devices. Furthermore, the validity of the assumptions used in this series resistance extraction procedure is examined and shown to be justified. In an attempt to further test the validity of this technique, several known external resistors were inserted in series with the device under test. The series resistance extraction procedure faithfully reproduces these known external resistances to within ±10%.</description><subject>Accuracy</subject><subject>Applied sciences</subject><subject>CMOS</subject><subject>CMOS integrated circuits</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Devices</subject><subject>Electronic equipment and fabrication. Passive components, printed wiring boards, connectics</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Extraction</subject><subject>Integrated circuits</subject><subject>Logic gates</subject><subject>Methodology</subject><subject>MOSFET circuits</subject><subject>MOSFETs</subject><subject>Obstacles</subject><subject>Resistance</subject><subject>Resistors</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Series resistance</subject><issn>0741-3106</issn><issn>1558-0563</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2011</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkE1rGzEQQEVJIU7Se6AXUQg5raPRx2p1NI7TltoY6uQsZO1sq7C2XGkdmn8fGZscctJh3jxGj5BrYGMAZu7ms_sxZwBjDqqBRnwiI1CqqZiqxRkZMS2hEsDqc3KR8zNjIKWWI_JrQldhs-uRrjAFzPQ35pAHt_VIZ_-H5PwQ4pYucPgb29jHP6-0i4lO2pcD0tLpYrmi9_gSPOYr8rlzfcYvp_eSPD3MHqc_qvny-8_pZF55ofhQqWbtteiM0SBavva18DX34FqlefmBMb7j5eg162pdM5QKa1UruZbcaaHaRlyS26N3l-K_PebBbkL22Pdui3GfrWHaiCKHQn77QD7HfdqW46yBIm0k0wViR8inmHPCzu5S2Lj0aoHZQ1tb2tpDW3tqW1ZuTl6Xveu7VGKE_L7HpQRl-EH99cgFRHwfKyOkUI14A0gFfzE</recordid><startdate>20110801</startdate><enddate>20110801</enddate><creator>Campbell, J. P.</creator><creator>Cheung, K. P.</creator><creator>Suehle, J. S.</creator><creator>Oates, A.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><scope>F28</scope><scope>FR3</scope></search><sort><creationdate>20110801</creationdate><title>A Simple Series Resistance Extraction Methodology for Advanced CMOS Devices</title><author>Campbell, J. P. ; Cheung, K. P. ; Suehle, J. S. ; Oates, A.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c352t-58bc73f99713d2bc63c62c1ad57220199cf2563b0f6760e45e65654b42a735d83</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2011</creationdate><topic>Accuracy</topic><topic>Applied sciences</topic><topic>CMOS</topic><topic>CMOS integrated circuits</topic><topic>Design. Technologies. Operation analysis. Testing</topic><topic>Devices</topic><topic>Electronic equipment and fabrication. Passive components, printed wiring boards, connectics</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Extraction</topic><topic>Integrated circuits</topic><topic>Logic gates</topic><topic>Methodology</topic><topic>MOSFET circuits</topic><topic>MOSFETs</topic><topic>Obstacles</topic><topic>Resistance</topic><topic>Resistors</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Series resistance</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Campbell, J. P.</creatorcontrib><creatorcontrib>Cheung, K. P.</creatorcontrib><creatorcontrib>Suehle, J. S.</creatorcontrib><creatorcontrib>Oates, A.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE electron device letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Campbell, J. P.</au><au>Cheung, K. P.</au><au>Suehle, J. S.</au><au>Oates, A.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A Simple Series Resistance Extraction Methodology for Advanced CMOS Devices</atitle><jtitle>IEEE electron device letters</jtitle><stitle>LED</stitle><date>2011-08-01</date><risdate>2011</risdate><volume>32</volume><issue>8</issue><spage>1047</spage><epage>1049</epage><pages>1047-1049</pages><issn>0741-3106</issn><eissn>1558-0563</eissn><coden>EDLEDZ</coden><abstract>Series resistance has become a serious obstacle inhibiting the performance of advanced CMOS devices. However, series resistance quantification in these same advanced CMOS devices is becoming exceedingly difficult. In this letter, we demonstrate a very simple series resistance extraction procedure which is derived only from the ratio of two linear ID - VG measurements. This approach has a verifiable accuracy check and is successfully used to extract the series resistance from several advanced devices. Furthermore, the validity of the assumptions used in this series resistance extraction procedure is examined and shown to be justified. In an attempt to further test the validity of this technique, several known external resistors were inserted in series with the device under test. The series resistance extraction procedure faithfully reproduces these known external resistances to within ±10%.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/LED.2011.2158183</doi><tpages>3</tpages></addata></record> |
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| subjects | Accuracy Applied sciences CMOS CMOS integrated circuits Design. Technologies. Operation analysis. Testing Devices Electronic equipment and fabrication. Passive components, printed wiring boards, connectics Electronics Exact sciences and technology Extraction Integrated circuits Logic gates Methodology MOSFET circuits MOSFETs Obstacles Resistance Resistors Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Series resistance |
| title | A Simple Series Resistance Extraction Methodology for Advanced CMOS Devices |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-03T22%3A55%3A49IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=A%20Simple%20Series%20Resistance%20Extraction%20Methodology%20for%20Advanced%20CMOS%20Devices&rft.jtitle=IEEE%20electron%20device%20letters&rft.au=Campbell,%20J.%20P.&rft.date=2011-08-01&rft.volume=32&rft.issue=8&rft.spage=1047&rft.epage=1049&rft.pages=1047-1049&rft.issn=0741-3106&rft.eissn=1558-0563&rft.coden=EDLEDZ&rft_id=info:doi/10.1109/LED.2011.2158183&rft_dat=%3Cproquest_RIE%3E907937131%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=915658407&rft_id=info:pmid/&rft_ieee_id=5934358&rfr_iscdi=true |