A Low-Noise Wide-BW 3.6-GHz Digital [Formula Omitted] Fractional-N Frequency Synthesizer With a Noise-Shaping Time-to-Digital Converter and Quantization Noise Cancellation

A 3.6-GHz digital fractional-N frequency synthesizer achieving low noise and 500-kHz bandwidth is presented. This architecture uses a gated-ring- oscillator time-to-digital converter (TDC) with 6-ps raw resolution and first-order shaping [abstract truncated by publisher].

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Veröffentlicht in:IEEE journal of solid-state circuits 2008-12, Vol.43 (12), p.2776-2786
Hauptverfasser: Hsu, Chun-Ming, Straayer, M Z, Perrott, M H
Format: Artikel
Sprache:eng
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Beschreibung
Zusammenfassung:A 3.6-GHz digital fractional-N frequency synthesizer achieving low noise and 500-kHz bandwidth is presented. This architecture uses a gated-ring- oscillator time-to-digital converter (TDC) with 6-ps raw resolution and first-order shaping [abstract truncated by publisher].
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2008.2005704