On the body-source built-in potential lowering of SOI MOSFETs

This letter provides a viewpoint for the characterization of state-of-the-art thin film silicon-on-insulator (SOI) MOSFETs. Based on body-source built-in potential lowering, the degree of full depletion can be quantified. In addition to serving as a measure of the floating-body behavior of SOI devic...

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Veröffentlicht in:IEEE electron device letters 2003-02, Vol.24 (2), p.90-92
Hauptverfasser: Pin Su, Fung, S.K.H., Wyatt, P.W., Hui Wan, Niknejad, A.M., Chan, M., Chenming Hu
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Sprache:eng
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Zusammenfassung:This letter provides a viewpoint for the characterization of state-of-the-art thin film silicon-on-insulator (SOI) MOSFETs. Based on body-source built-in potential lowering, the degree of full depletion can be quantified. In addition to serving as a measure of the floating-body behavior of SOI devices, the concept also enables the consolidation of partial-depletion (PD) and full-depletion (FD) SOI compact models. This consolidation of compact models together with the trend of coexistence of PD/FD devices in a single chip has become one of the greatest challenges in the scaling of SOI CMOS.
ISSN:0741-3106
1558-0563
DOI:10.1109/LED.2002.807696