A versatile built-in CMOS sensing device for digital circuit parametric test

A versatile CMOS current sensing device is proposed as a built-in self-test (BIST) monitor for conventional digital I/sub DDQ/ power supply current test. A novel sensor topology is successfully employed in a current monitoring testing scheme. The sensor is implemented in two CMOS processes, 0.13 /sp...

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Veröffentlicht in:IEEE transactions on instrumentation and measurement 2003-12, Vol.52 (6), p.1756-1764
Hauptverfasser: Dragic, M.S., Margala, M.
Format: Artikel
Sprache:eng
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Zusammenfassung:A versatile CMOS current sensing device is proposed as a built-in self-test (BIST) monitor for conventional digital I/sub DDQ/ power supply current test. A novel sensor topology is successfully employed in a current monitoring testing scheme. The sensor is implemented in two CMOS processes, 0.13 /spl mu/m and 0.18 /spl mu/m with 1.2-V and 1.8-V power supply, respectively. For verification purposes, performances of the 0.13-/spl mu/m design are investigated on several types of digital circuits: 64-bit RCA adder, 16-bit register, and inverter chain. Our analysis shows excellent detection capabilities of noncatastrophic short and open defects. Overall performance penalty and power supply degradation of the circuit under test are evaluated on 1.2-V 500-gate, 1000-gate, and 2000-gate asynchronous digital logic. Average power supply degradation of the 2000-gate logic tested at 20 MHz is recorded to be less than 0.6% which produced a 250-ps delay in the 100-gate critical path. The presented sensor is a scalable and practical embedded solution for high-frequency parametric I/sub DDQ/ test of standard CMOS digital circuits.
ISSN:0018-9456
1557-9662
DOI:10.1109/TIM.2003.818725