A CMOS smart temperature sensor with a 3 sigma inaccuracy of +/-0.5 degree C from -50 degree C to 120 degree C

A low-cost temperature sensor with on-chip sigma-delta ADC and digital bus interface was realized in a 0.5 mu m CMOS process. Substrate PNP transistors are used for temperature sensing and for generating the ADC's reference voltage. To obtain a high initial accuracy in the readout circuitry, chopper amplifiers and dynamic element matching are used. High linearity is obtained by using second-order curvature correction. With these measures, the sensor's temperature error is dominated by spread on the base-emitter voltage of the PNP transistors. This is trimmed after packaging by comparing the sensor's output with the die temperature measured using an extra on-chip calibration transistor. Compared to traditional calibration techniques, this procedure is much faster and therefore reduces production costs. The sensor is accurate to within +/-0.5 degree C (3 sigma ) from -50 degree C to 120 degree C.