Concurrent error detection for involutional functions with applications in fault-tolerant cryptographic hardware design

Concurrent error detection for involutional functions with applications in fault-tolerant cryptographic hardware design

In this paper, a time redundancy based Concurrent Error Detection (CED) technique targeting involutional functions is presented. A function F is an involution if F(F(x))=x. The proposed CED technique exploits the involution property and checks if x=F(F(x)). Unlike traditional time redundancy based C...

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Veröffentlicht in:IEEE transactions on computer-aided design of integrated circuits and systems 2006-06, Vol.25 (6), p.1163-1169
Hauptverfasser: Joshi, N., Kaijie Wu, Sundararajan, J., Karri, R.
Format: Artikel
Sprache:eng
Schlagworte:
Anubis
Circuit faults
Concurrent Error Detection (CED)
Cryptography
Design engineering
Electrical fault detection
Error detection
Fault detection
Fault tolerance
Hardware
Integrated circuit synthesis
involution
Khazad
Mathematical analysis
Mathematical models
Redundancy
Very high speed integrated circuits
Very large scale integration
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Beschreibung
Zusammenfassung:In this paper, a time redundancy based Concurrent Error Detection (CED) technique targeting involutional functions is presented. A function F is an involution if F(F(x))=x. The proposed CED technique exploits the involution property and checks if x=F(F(x)). Unlike traditional time redundancy based CED methods, this technique can detect both permanent and transient faults
ISSN:0278-0070
1937-4151
DOI:10.1109/TCAD.2005.855980