Impact of nitrogen post deposition annealing on hafnium zirconate dielectrics for 32 nm high-performance SOI CMOS technologies

The impact of either N 2 or N 2/O 2 Post Deposition Annealing (PDA) and Post Work Function Annealing (PWFA) combinations as well as single N 2 or N 2/O 2 PWFA with different process parameters on HfZrO 4 has been investigated in detail for high performance 32 nm SOI CMOS devices. Electrical paramete...

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Veröffentlicht in:Microelectronic engineering 2011-01, Vol.88 (2), p.141-144
Hauptverfasser: Kelwing, T., Naumann, A., Trentzsch, M., Graetsch, F., Bayha, B., Herrmann, L., Trui, B., Rudolph, D., Lipp, D., Krause, G., Carter, R., Stephan, R., Kücher, P., Hansch, W.
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container_end_page 144
container_issue 2
container_start_page 141
container_title Microelectronic engineering
container_volume 88
creator Kelwing, T.
Naumann, A.
Trentzsch, M.
Graetsch, F.
Bayha, B.
Herrmann, L.
Trui, B.
Rudolph, D.
Lipp, D.
Krause, G.
Carter, R.
Stephan, R.
Kücher, P.
Hansch, W.
description The impact of either N 2 or N 2/O 2 Post Deposition Annealing (PDA) and Post Work Function Annealing (PWFA) combinations as well as single N 2 or N 2/O 2 PWFA with different process parameters on HfZrO 4 has been investigated in detail for high performance 32 nm SOI CMOS devices. Electrical parameters such as leakage current, capacitance equivalent thickness (CET), threshold voltage and performance as well as reliability data have been taken into account in order to evaluate these treatments. N 2/O 2 annealing results in severe oxide regrowth due to the presence of oxygen in the annealing ambient. A detailed investigation on the impact of N 2 PWFA has been performed. Finally significant gate leakage current benefit, performance and reliability improvements are demonstrated especially for the N 2 PWFA treatments in combination with HfZrO 4.
doi_str_mv 10.1016/j.mee.2010.09.019
format Article
fullrecord <record><control><sourceid>proquest_pasca</sourceid><recordid>TN_cdi_proquest_miscellaneous_896181934</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><els_id>S0167931710003527</els_id><sourcerecordid>896181934</sourcerecordid><originalsourceid>FETCH-LOGICAL-e302t-1d89d5957650b9896f75acfeafdad128743d39b9228526120d6e445a6d70b1ae3</originalsourceid><addsrcrecordid>eNp9kU9rGzEUxEVpoa7TD9CbLiG9rKM_K-2KnIppEkOCD2nPQpbe2jK70kaSA-mhnz0KyTmnxzx-DMwMQj8oWVFC5eVxNQGsGKmaqBWh6hNa0L7jjRCy_4wWlekaxWn3FX3L-Uiqbkm_QP8302xswXHAwZcU9xDwHHPBDurxxceATQhgRh_2uIqDGYI_TfifTzYGUwA7DyPYkrzNeIgJc4bDhA9-f2hmSPUzmWABP2w3eH2_fcAF7CHEMe495DP0ZTBjhu_vd4n-Xv_-s75t7rY3m_WvuwY4YaWhrldOKNFJQXaqV3LohLEDmMEZR1nftdxxtVOM9YJJyoiT0LbCSNeRHTXAl-jizXdO8fEEuejJZwvjaALEU9bVkvZU8baSPz8kqVSMd0TWbpfo_B012ZpxSDWnz3pOfjLpWTMuuWgVrdzVGwc14ZOHpLP1UDtxPtXitIteU6Jfd9RHXXfUrztqonTdkb8AqkmSjA</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>1692370687</pqid></control><display><type>article</type><title>Impact of nitrogen post deposition annealing on hafnium zirconate dielectrics for 32 nm high-performance SOI CMOS technologies</title><source>ScienceDirect Journals (5 years ago - present)</source><creator>Kelwing, T. ; Naumann, A. ; Trentzsch, M. ; Graetsch, F. ; Bayha, B. ; Herrmann, L. ; Trui, B. ; Rudolph, D. ; Lipp, D. ; Krause, G. ; Carter, R. ; Stephan, R. ; Kücher, P. ; Hansch, W.</creator><creatorcontrib>Kelwing, T. ; Naumann, A. ; Trentzsch, M. ; Graetsch, F. ; Bayha, B. ; Herrmann, L. ; Trui, B. ; Rudolph, D. ; Lipp, D. ; Krause, G. ; Carter, R. ; Stephan, R. ; Kücher, P. ; Hansch, W.</creatorcontrib><description>The impact of either N 2 or N 2/O 2 Post Deposition Annealing (PDA) and Post Work Function Annealing (PWFA) combinations as well as single N 2 or N 2/O 2 PWFA with different process parameters on HfZrO 4 has been investigated in detail for high performance 32 nm SOI CMOS devices. Electrical parameters such as leakage current, capacitance equivalent thickness (CET), threshold voltage and performance as well as reliability data have been taken into account in order to evaluate these treatments. N 2/O 2 annealing results in severe oxide regrowth due to the presence of oxygen in the annealing ambient. A detailed investigation on the impact of N 2 PWFA has been performed. Finally significant gate leakage current benefit, performance and reliability improvements are demonstrated especially for the N 2 PWFA treatments in combination with HfZrO 4.</description><identifier>ISSN: 0167-9317</identifier><identifier>EISSN: 1873-5568</identifier><identifier>DOI: 10.1016/j.mee.2010.09.019</identifier><identifier>CODEN: MIENEF</identifier><language>eng</language><publisher>Amsterdam: Elsevier B.V</publisher><subject>Annealing ; Applied sciences ; CMOS ; Cold working, work hardening; annealing, quenching, tempering, recovery, and recrystallization; textures ; Condensed matter: electronic structure, electrical, magnetic, and optical properties ; Cross-disciplinary physics: materials science; rheology ; Deposition ; Design. Technologies. Operation analysis. Testing ; Devices ; Electronic structure and electrical properties of surfaces, interfaces, thin films and low-dimensional structures ; Electronics ; Exact sciences and technology ; Gate leakage ; Hafnium ; Heat treatment ; High-k dielectric ; Integrated circuits ; Leakage current ; Materials science ; Metals. Metallurgy ; PDA ; Physics ; Production techniques ; Reliability ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; SOI CMOS ; Surface double layers, schottky barriers, and work functions ; Threshold voltage ; Treatment of materials and its effects on microstructure and properties</subject><ispartof>Microelectronic engineering, 2011-01, Vol.88 (2), p.141-144</ispartof><rights>2010 Elsevier B.V.</rights><rights>2015 INIST-CNRS</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://www.sciencedirect.com/science/article/pii/S0167931710003527$$EHTML$$P50$$Gelsevier$$H</linktohtml><link.rule.ids>314,776,780,3537,27901,27902,65306</link.rule.ids><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&amp;idt=23635491$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Kelwing, T.</creatorcontrib><creatorcontrib>Naumann, A.</creatorcontrib><creatorcontrib>Trentzsch, M.</creatorcontrib><creatorcontrib>Graetsch, F.</creatorcontrib><creatorcontrib>Bayha, B.</creatorcontrib><creatorcontrib>Herrmann, L.</creatorcontrib><creatorcontrib>Trui, B.</creatorcontrib><creatorcontrib>Rudolph, D.</creatorcontrib><creatorcontrib>Lipp, D.</creatorcontrib><creatorcontrib>Krause, G.</creatorcontrib><creatorcontrib>Carter, R.</creatorcontrib><creatorcontrib>Stephan, R.</creatorcontrib><creatorcontrib>Kücher, P.</creatorcontrib><creatorcontrib>Hansch, W.</creatorcontrib><title>Impact of nitrogen post deposition annealing on hafnium zirconate dielectrics for 32 nm high-performance SOI CMOS technologies</title><title>Microelectronic engineering</title><description>The impact of either N 2 or N 2/O 2 Post Deposition Annealing (PDA) and Post Work Function Annealing (PWFA) combinations as well as single N 2 or N 2/O 2 PWFA with different process parameters on HfZrO 4 has been investigated in detail for high performance 32 nm SOI CMOS devices. Electrical parameters such as leakage current, capacitance equivalent thickness (CET), threshold voltage and performance as well as reliability data have been taken into account in order to evaluate these treatments. N 2/O 2 annealing results in severe oxide regrowth due to the presence of oxygen in the annealing ambient. A detailed investigation on the impact of N 2 PWFA has been performed. Finally significant gate leakage current benefit, performance and reliability improvements are demonstrated especially for the N 2 PWFA treatments in combination with HfZrO 4.</description><subject>Annealing</subject><subject>Applied sciences</subject><subject>CMOS</subject><subject>Cold working, work hardening; annealing, quenching, tempering, recovery, and recrystallization; textures</subject><subject>Condensed matter: electronic structure, electrical, magnetic, and optical properties</subject><subject>Cross-disciplinary physics: materials science; rheology</subject><subject>Deposition</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Devices</subject><subject>Electronic structure and electrical properties of surfaces, interfaces, thin films and low-dimensional structures</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Gate leakage</subject><subject>Hafnium</subject><subject>Heat treatment</subject><subject>High-k dielectric</subject><subject>Integrated circuits</subject><subject>Leakage current</subject><subject>Materials science</subject><subject>Metals. Metallurgy</subject><subject>PDA</subject><subject>Physics</subject><subject>Production techniques</subject><subject>Reliability</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>SOI CMOS</subject><subject>Surface double layers, schottky barriers, and work functions</subject><subject>Threshold voltage</subject><subject>Treatment of materials and its effects on microstructure and properties</subject><issn>0167-9317</issn><issn>1873-5568</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2011</creationdate><recordtype>article</recordtype><recordid>eNp9kU9rGzEUxEVpoa7TD9CbLiG9rKM_K-2KnIppEkOCD2nPQpbe2jK70kaSA-mhnz0KyTmnxzx-DMwMQj8oWVFC5eVxNQGsGKmaqBWh6hNa0L7jjRCy_4wWlekaxWn3FX3L-Uiqbkm_QP8302xswXHAwZcU9xDwHHPBDurxxceATQhgRh_2uIqDGYI_TfifTzYGUwA7DyPYkrzNeIgJc4bDhA9-f2hmSPUzmWABP2w3eH2_fcAF7CHEMe495DP0ZTBjhu_vd4n-Xv_-s75t7rY3m_WvuwY4YaWhrldOKNFJQXaqV3LohLEDmMEZR1nftdxxtVOM9YJJyoiT0LbCSNeRHTXAl-jizXdO8fEEuejJZwvjaALEU9bVkvZU8baSPz8kqVSMd0TWbpfo_B012ZpxSDWnz3pOfjLpWTMuuWgVrdzVGwc14ZOHpLP1UDtxPtXitIteU6Jfd9RHXXfUrztqonTdkb8AqkmSjA</recordid><startdate>20110101</startdate><enddate>20110101</enddate><creator>Kelwing, T.</creator><creator>Naumann, A.</creator><creator>Trentzsch, M.</creator><creator>Graetsch, F.</creator><creator>Bayha, B.</creator><creator>Herrmann, L.</creator><creator>Trui, B.</creator><creator>Rudolph, D.</creator><creator>Lipp, D.</creator><creator>Krause, G.</creator><creator>Carter, R.</creator><creator>Stephan, R.</creator><creator>Kücher, P.</creator><creator>Hansch, W.</creator><general>Elsevier B.V</general><general>Elsevier</general><scope>IQODW</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>20110101</creationdate><title>Impact of nitrogen post deposition annealing on hafnium zirconate dielectrics for 32 nm high-performance SOI CMOS technologies</title><author>Kelwing, T. ; Naumann, A. ; Trentzsch, M. ; Graetsch, F. ; Bayha, B. ; Herrmann, L. ; Trui, B. ; Rudolph, D. ; Lipp, D. ; Krause, G. ; Carter, R. ; Stephan, R. ; Kücher, P. ; Hansch, W.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-e302t-1d89d5957650b9896f75acfeafdad128743d39b9228526120d6e445a6d70b1ae3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2011</creationdate><topic>Annealing</topic><topic>Applied sciences</topic><topic>CMOS</topic><topic>Cold working, work hardening; annealing, quenching, tempering, recovery, and recrystallization; textures</topic><topic>Condensed matter: electronic structure, electrical, magnetic, and optical properties</topic><topic>Cross-disciplinary physics: materials science; rheology</topic><topic>Deposition</topic><topic>Design. Technologies. Operation analysis. Testing</topic><topic>Devices</topic><topic>Electronic structure and electrical properties of surfaces, interfaces, thin films and low-dimensional structures</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Gate leakage</topic><topic>Hafnium</topic><topic>Heat treatment</topic><topic>High-k dielectric</topic><topic>Integrated circuits</topic><topic>Leakage current</topic><topic>Materials science</topic><topic>Metals. Metallurgy</topic><topic>PDA</topic><topic>Physics</topic><topic>Production techniques</topic><topic>Reliability</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>SOI CMOS</topic><topic>Surface double layers, schottky barriers, and work functions</topic><topic>Threshold voltage</topic><topic>Treatment of materials and its effects on microstructure and properties</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Kelwing, T.</creatorcontrib><creatorcontrib>Naumann, A.</creatorcontrib><creatorcontrib>Trentzsch, M.</creatorcontrib><creatorcontrib>Graetsch, F.</creatorcontrib><creatorcontrib>Bayha, B.</creatorcontrib><creatorcontrib>Herrmann, L.</creatorcontrib><creatorcontrib>Trui, B.</creatorcontrib><creatorcontrib>Rudolph, D.</creatorcontrib><creatorcontrib>Lipp, D.</creatorcontrib><creatorcontrib>Krause, G.</creatorcontrib><creatorcontrib>Carter, R.</creatorcontrib><creatorcontrib>Stephan, R.</creatorcontrib><creatorcontrib>Kücher, P.</creatorcontrib><creatorcontrib>Hansch, W.</creatorcontrib><collection>Pascal-Francis</collection><collection>Electronics &amp; Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>Microelectronic engineering</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Kelwing, T.</au><au>Naumann, A.</au><au>Trentzsch, M.</au><au>Graetsch, F.</au><au>Bayha, B.</au><au>Herrmann, L.</au><au>Trui, B.</au><au>Rudolph, D.</au><au>Lipp, D.</au><au>Krause, G.</au><au>Carter, R.</au><au>Stephan, R.</au><au>Kücher, P.</au><au>Hansch, W.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Impact of nitrogen post deposition annealing on hafnium zirconate dielectrics for 32 nm high-performance SOI CMOS technologies</atitle><jtitle>Microelectronic engineering</jtitle><date>2011-01-01</date><risdate>2011</risdate><volume>88</volume><issue>2</issue><spage>141</spage><epage>144</epage><pages>141-144</pages><issn>0167-9317</issn><eissn>1873-5568</eissn><coden>MIENEF</coden><abstract>The impact of either N 2 or N 2/O 2 Post Deposition Annealing (PDA) and Post Work Function Annealing (PWFA) combinations as well as single N 2 or N 2/O 2 PWFA with different process parameters on HfZrO 4 has been investigated in detail for high performance 32 nm SOI CMOS devices. Electrical parameters such as leakage current, capacitance equivalent thickness (CET), threshold voltage and performance as well as reliability data have been taken into account in order to evaluate these treatments. N 2/O 2 annealing results in severe oxide regrowth due to the presence of oxygen in the annealing ambient. A detailed investigation on the impact of N 2 PWFA has been performed. Finally significant gate leakage current benefit, performance and reliability improvements are demonstrated especially for the N 2 PWFA treatments in combination with HfZrO 4.</abstract><cop>Amsterdam</cop><pub>Elsevier B.V</pub><doi>10.1016/j.mee.2010.09.019</doi><tpages>4</tpages></addata></record>
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1873-5568
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source ScienceDirect Journals (5 years ago - present)
subjects Annealing
Applied sciences
CMOS
Cold working, work hardening
annealing, quenching, tempering, recovery, and recrystallization
textures
Condensed matter: electronic structure, electrical, magnetic, and optical properties
Cross-disciplinary physics: materials science
rheology
Deposition
Design. Technologies. Operation analysis. Testing
Devices
Electronic structure and electrical properties of surfaces, interfaces, thin films and low-dimensional structures
Electronics
Exact sciences and technology
Gate leakage
Hafnium
Heat treatment
High-k dielectric
Integrated circuits
Leakage current
Materials science
Metals. Metallurgy
PDA
Physics
Production techniques
Reliability
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
SOI CMOS
Surface double layers, schottky barriers, and work functions
Threshold voltage
Treatment of materials and its effects on microstructure and properties
title Impact of nitrogen post deposition annealing on hafnium zirconate dielectrics for 32 nm high-performance SOI CMOS technologies
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-02T17%3A13%3A31IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_pasca&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Impact%20of%20nitrogen%20post%20deposition%20annealing%20on%20hafnium%20zirconate%20dielectrics%20for%2032%20nm%20high-performance%20SOI%20CMOS%20technologies&rft.jtitle=Microelectronic%20engineering&rft.au=Kelwing,%20T.&rft.date=2011-01-01&rft.volume=88&rft.issue=2&rft.spage=141&rft.epage=144&rft.pages=141-144&rft.issn=0167-9317&rft.eissn=1873-5568&rft.coden=MIENEF&rft_id=info:doi/10.1016/j.mee.2010.09.019&rft_dat=%3Cproquest_pasca%3E896181934%3C/proquest_pasca%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=1692370687&rft_id=info:pmid/&rft_els_id=S0167931710003527&rfr_iscdi=true