A 0.027-mm super(2) Self-Calibrating Successive Approximation ADC Core in 0.18-[mu]m CMOS
We present a 10-bit 1-MS/s successive approximation analog-to-digital converter core including a charge redistribution digital-to-analog converter and a comparator. A new linearity calibration technique enables use of a nearly minimum capacitor limited by kT/C noise. The ADC core without digital con...
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Veröffentlicht in: | IEICE transactions on fundamentals of electronics, communications and computer sciences communications and computer sciences, 2009-01, Vol.E92.A (2), p.360-366 |
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