A 92 GHz Bandwidth Distributed Amplifier in a 45 nm SOI CMOS Technology

A low-power cascode distributed amplifier is demonstrated in a 45 nm silicon-on-insulator (SOI) CMOS process. The amplifier achieves a 3 dB bandwidth of 92 GHz. The peak gain is 9 dB with a gain-ripple of less 1.5 dB over the 3 dB bandwidth. The group-delay variation is under ±4.7 ps over the 3 dB b...

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Veröffentlicht in:IEEE microwave and wireless components letters 2011-06, Vol.21 (6), p.329-331
Hauptverfasser: Joohwa Kim, Buckwalter, J F
Format: Artikel
Sprache:eng
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Zusammenfassung:A low-power cascode distributed amplifier is demonstrated in a 45 nm silicon-on-insulator (SOI) CMOS process. The amplifier achieves a 3 dB bandwidth of 92 GHz. The peak gain is 9 dB with a gain-ripple of less 1.5 dB over the 3 dB bandwidth. The group-delay variation is under ±4.7 ps over the 3 dB bandwidth. The amplifier consumes 73.5 mW from a 1.2 V supply and results in a gain-bandwidth efficiency figure of merit of 3.53 GHz/mW. The chip occupies an area of 0.45 mm 2 including the pads.
ISSN:1531-1309
2771-957X
1558-1764
2771-9588
DOI:10.1109/LMWC.2011.2139197