Measurement of Integrated PA-to-LNA Isolation on Si CMOS Chip

This paper presents measurement of on-chip coupling between PA and LNA integrated on Si CMOS substrate, which is caused by substrate coupling, magnetic coupling, power-line coupling, etc. These components are decomposed by measurements using diced chips. The result reveals that the substrate couplin...

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Veröffentlicht in:IEICE Transactions on Electronics 2011/06/01, Vol.E94.C(6), pp.1057-1060
Hauptverfasser: MINAMI, Ryo, HONG, JeeYoung, OKADA, Kenichi, MATSUZAWA, Akira
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Sprache:eng
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Zusammenfassung:This paper presents measurement of on-chip coupling between PA and LNA integrated on Si CMOS substrate, which is caused by substrate coupling, magnetic coupling, power-line coupling, etc. These components are decomposed by measurements using diced chips. The result reveals that the substrate coupling is the most dominant in CMOS chips and the total isolation becomes less than -50dB with more than 0.4mm PA-to-LNA distance.
ISSN:0916-8524
1745-1353
1745-1353
DOI:10.1587/transele.E94.C.1057