36-GHz, 16×6-bit ROM in InP DHBT technology suitable for DDS application

A 16times6-bit read-only memory (ROM), employing an architecture suitable for use as a phase to amplitude converter for direct digital synthesizers (DDS), has been implemented in InP double heterojunction bipolar transistor (DHBT) technology. The ROM uses a -3.8 V power supply and dissipates 1.13 W...

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Veröffentlicht in:	IEEE journal of solid-state circuits 2007-02, Vol.42 (2), p.451-456
Hauptverfasser:	MANANDHAR, Sanjeev, TURNER, Steven Eugene, KOTECKI, David E
Format:	Artikel
Sprache:	eng
Schlagworte:	Applied sciences Circuit properties Circuits Clocks Digital to analog converters Dissipation Electric, optical and optoelectronic circuits Electronic circuits Electronics Exact sciences and technology Heterojunction bipolar transistors High speed Indium phosphides Integrated circuits Integrated circuits by function (including memories and processors) Oscillators, resonators, synthetizers Power supplies Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Signal convertors Transistors
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Beschreibung
Zusammenfassung:	A 16times6-bit read-only memory (ROM), employing an architecture suitable for use as a phase to amplitude converter for direct digital synthesizers (DDS), has been implemented in InP double heterojunction bipolar transistor (DHBT) technology. The ROM uses a -3.8 V power supply and dissipates 1.13 W of power. The ROM is implemented in a test circuit that includes an 8-bit accumulator and a 6-bit digital-to-analog converter (DAC) to facilitate demonstration of high-speed operation. The maximum operating clock frequency is measured to be 36 GHz
ISSN:	0018-9200 1558-173X
DOI:	10.1109/JSSC.2006.889361