A 0.25-μm CMOS 1.9-GHz PHS RF transceiver with a 150-kHz low-IF architecture

We present a 1.9-GHz Personal Handy-phone System (PHS) transceiver, fully integrated and fabricated in 0.25-mum CMOS technology. The receiver is based on a 150-kHz low-IF architecture and meets the fast channel switching and DC-offset cancellation requirements of PHS. It includes a low-noise amplifi...

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Veröffentlicht in:IEEE journal of solid-state circuits 2007-06, Vol.42 (6), p.1318-1327
Hauptverfasser: JEONG, Hoesam, YOO, Byoung-Joo, HAN, Cheolkyu, LEE, Sang-Yoon, LEE, Kang-Yoon, KIM, Suhwan, JEONG, Deog-Kyoon, KIM, Wonchan
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Sprache:eng
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Zusammenfassung:We present a 1.9-GHz Personal Handy-phone System (PHS) transceiver, fully integrated and fabricated in 0.25-mum CMOS technology. The receiver is based on a 150-kHz low-IF architecture and meets the fast channel switching and DC-offset cancellation requirements of PHS. It includes a low-noise amplifier (LNA), a downconversion mixer, a complex filter, and a programmable gain amplifier. A fractional-N frequency synthesizer achieves seamless handover with a 25 mus channel switching time and a phase noise of -121 dBc/Hz at a 600-kHz offset frequency, with compliant ACS performance. The receiver provides -105 dBm sensitivity and 55 dBc ACS at a 600-kHz frequency offset. The transmitter is based on the direct modulation architecture and consists of an upconversion mixer and a pre-driver stage. The gain of the pre-driver is digitally controllable to suit any type of commercial power amplifier. The transmitter shows a 3% EVM and a 65 dBc ACPR at a 600-kHz offset frequency. The whole transceiver occupies 15.2 mm super(2 ) and dissipates 70 mA in RX and 44 mA in TX, with a 2.8-V supply
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2007.897132