Closed-Form Expressions of 3-D Via Resistance, Inductance, and Capacitance

Closed-Form Expressions of 3-D Via Resistance, Inductance, and Capacitance

Closed-form expressions of the resistance, capacitance, and inductance for interplane 3-D vias are presented in this paper. The closed-form expressions account for the 3-D via length, diameter, dielectric thickness, and spacing to ground. A 3-D numerical simulation is used to extract electromagnetic...

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Veröffentlicht in:IEEE transactions on electron devices 2009-09, Vol.56 (9), p.1873-1881
Hauptverfasser: Savidis, I., Friedman, E.G.
Format: Artikel
Sprache:eng
Schlagworte:
3-D
Capacitance
Closed-form expressions
Closed-form solution
Computer simulation
Dielectrics
electrical characterization
Exact solutions
Grounds
Inductance
Mathematical analysis
Mathematical model
Mathematical models
Resistance
Silicon
Solid modeling
TSV
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Zusammenfassung:Closed-form expressions of the resistance, capacitance, and inductance for interplane 3-D vias are presented in this paper. The closed-form expressions account for the 3-D via length, diameter, dielectric thickness, and spacing to ground. A 3-D numerical simulation is used to extract electromagnetic solutions of the resistance, capacitance, and inductance for comparison with the closed-form expressions, revealing good agreement between simulation and the physical models. The maximum error for the resistance, capacitance, and inductance is less than 8%.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2009.2026200