Complementary Antiparallel Schottky Barrier Diode Pair in a 0.13- [Formula Omitted] Logic CMOS Technology
A shunt-connected complementary antiparallel diode pair (C-APDP) using n- and p-type Schottky barrier diodes (SBDs) in a 0.13-mum CMOS logic process is demonstrated. The structure eliminates the deleterious effects of parasitic capacitance to substrate and reduces the substrate resistance effects. T...
Gespeichert in:
Veröffentlicht in: | IEEE electron device letters 2008-06, Vol.29 (6), p.606-608 |
---|---|
Hauptverfasser: | , , |
Format: | Artikel |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | A shunt-connected complementary antiparallel diode pair (C-APDP) using n- and p-type Schottky barrier diodes (SBDs) in a 0.13-mum CMOS logic process is demonstrated. The structure eliminates the deleterious effects of parasitic capacitance to substrate and reduces the substrate resistance effects. The extrapolated cutoff frequency of C-APDP is above 470 GHz, which demonstrates the potential as a millimeter-wave frequency component. The harmonic power measurements indicate that C-APDPs can generate more than 25 dB higher third harmonic powers than n-type SBDs. The C-APDPs can be integrated with the other devices in CMOS technologies to enable generation and processing of millimeter- and submillimeter-wave signals. |
---|---|
ISSN: | 0741-3106 1558-0563 |
DOI: | 10.1109/LED.2008.922981 |