Area reduction techniques for full integrated distributed amplifier

This paper presents two techniques to reduce the area in the design of CMOS distributed amplifiers. The proposed techniques take into account the influence of compacting the layout and the use of stacked inductor for the artificial transmission lines on the distributed amplifier performance. Followi...

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Veröffentlicht in:	International journal of electronics and communications 2010-11, Vol.64 (11), p.1055-1062
Hauptverfasser:	del Pino, J., Diaz, R., Khemchandani, S.L.
Format:	Artikel
Sprache:	eng
Schlagworte:	Area reduction CMOS Compacting Distributed amplifier Distributed amplifiers Electronics Inductors Integrated inductors Noise levels Reduction UWB
Online-Zugang:	Volltext
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