Modified Potential Well Formed by hbox Si / SiO 2 / hbox TiN / TiO 2 / hbox SiO 2 / hbox TaN for Flash Memory Application

This paper proposes a modified engineered-potential-well (MW) for NAND flash memory application. The MW was formed by using a transitional hbox SiO 2 / hbox SiO x hbox N y hbox - TiO x hbox N y tunnel barrier, a trap-rich hbox TiO 2 trapping layer, and an abrupt hbox SiO 2 block barrier. The transitional tunnel barrier shrinks to enhance the tunneling of carriers during programming/erasing (P/E) and extends to suppress charge loss during data retention. Deep-level transient spectroscopy suggests that this tunnel barrier has few shallow traps after a hbox N 2 + hbox O 2 thermal treatment, and the hbox TiO 2 trapping layer has deep electron traps. With the variable tunnel barrier and deep electron traps, the MW device showed promising performance in fast programming ( < k hbox s ) at low-voltage operation (7-10 MV/cm), good P/E endurance ( > hbox 10 6 Unknown character hbox P / E cycles ) , large threshold voltage window ( V rm th = 6 hbox 6 Unknown character V ) , as well as improved data retention at 125 [compfn] hbox C .