A 30-mW 8-b 125-MS/s pipelined ADC in 0.13-mm CMOS

A 30-mW 8-b 125-MS/s pipelined ADC in 0.13-mm CMOS

An 8-b pipelined ADC constructed in 0.13-*mm CMOS is described. This ADC uses a dual-supply technique to yield 8-b performance at a sampling rate of 125 MS/s while consuming 30 mW from 1.8-V and 1.2-V supplies. Active area is 0.4 mm. Numerous challenges associated with this choice of process technol...

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Veröffentlicht in:Analog integrated circuits and signal processing 2008-08, Vol.56 (1-2), p.43-51
Hauptverfasser: Heedley, Perry L, Dyer, Kenneth C, Matthews, Thomas W, Isakanian, Patrick, Thanh, Chuc
Format: Artikel
Sprache:eng
Schlagworte:
CMOS
Dynamic range
Gates
Integrated circuits
Leakage
Oxides
Sampling
Signal processing
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Zusammenfassung:An 8-b pipelined ADC constructed in 0.13-*mm CMOS is described. This ADC uses a dual-supply technique to yield 8-b performance at a sampling rate of 125 MS/s while consuming 30 mW from 1.8-V and 1.2-V supplies. Active area is 0.4 mm. Numerous challenges associated with this choice of process technology were overcome, such as limited dynamic range, copper metallization and the effects of gate oxide leakage.
ISSN:0925-1030
1573-1979
DOI:10.1007/s10470-007-9081-5