A low voltage current mode CMOS integrated receiver front-end for GPS system

This paper presents a low voltage, 1.6 GHz integrated receiver front-end which is implemented by the standard 0.35 μm, 3M2P CMOS technology. The receiver consists of a transconductance low noise amplifier (G m -LNA), a down conversion current mode mixer and a voltage-controlled oscillator using accumulation-mode MOS varactor (A-MOS VCO). A current mode mixer is used to reduce the supply voltage to 1 V. A specially designed G m -LNA converts RF input voltage to RF input current for the current mode mixer. This could eliminate an unnecessary I–V, V–I conversion and reduce the non-linearity contribution. Moreover, a low voltage A-MOS VCO, with a good phase noise and wide tuning frequency range, is used to generate a required oscillating frequency for the receiver. The integrated receiver front-end has a measured power conversion gain of 11.4 dB, an input referred third-order intercept point (IIP 3 ) of 6.1 dBm, and a noise figure of 5.87 dB. The measured total power consumption is 40.9 mW with 1 V supply.