Solutions and debugging for data consistency in multiprocessors with noncoherent caches

Two important problems that arise in shared-memory multiprocessor systems are analyzed. The stale data problem involves ensuring that data items in local memory of individual processors are current, independent of writes done by other processors. False sharing occurs when 2 processors have copies of the same shared data block but update different portions of the block. The false sharing problem involves guaranteeing that subsequent writes are properly combined. A debugging environment that will facilitate the development of compiler-based techniques and will help the programmer to tune an application using explicit cache management mechanisms is developed. The notion of a race condition for IBM Shared Memory System POWER/4 is extended, taking into consideration its noncoherent caches, and techniques for detection of false sharing problems are proposed. Identification of the stale data problem is discussed as well, and solutions are suggested.