An 8.1 mW, 82 dB Delta-Sigma ADC With 1.9 MHz BW and -98 dB THD
A switched-capacitor low-distortion 15-level delta-sigma ADC is described. It achieves third-order noise shaping with only two integrators by using quantization noise coupling. Realized in a 0.18 mum CMOS technology, it provides 81 dB SNDR, 82 dB dynamic range, and -98 dB THD in a signal bandwidth o...
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Veröffentlicht in: | IEEE journal of solid-state circuits 2009-08, Vol.44 (8), p.2202-2211 |
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Sprache: | eng |
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Zusammenfassung: | A switched-capacitor low-distortion 15-level delta-sigma ADC is described. It achieves third-order noise shaping with only two integrators by using quantization noise coupling. Realized in a 0.18 mum CMOS technology, it provides 81 dB SNDR, 82 dB dynamic range, and -98 dB THD in a signal bandwidth of 1.9 MHz. It dissipates 8.1 mW with a 1.5 V power supply (analog power 4.4 mW, digital power 3.7 mW). Its figure-of-merit is 0.25 pJ/conversion-step, which is among the best reported for discrete-time delta-sigma ADCs in wideband applications. |
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ISSN: | 0018-9200 1558-173X |
DOI: | 10.1109/JSSC.2009.2022298 |