Tuning the dipole at the High-[kappa]/SiO@@d2@ interface in advanced metal gate stacks

Combining two different electrical characterisation methods on the same MOS capacitors, we demonstrate that the flat band voltage of High-[kappa] metal gate stack is determined by a dipole at the High- [kappa]/SiO@@d2@ interface. Meanwhile, roll-off of flat band voltage, occurring for thin SiO@@d2@ inter layer, is also associated to a dipole variation at this same interface. We have measured its value and we show that this dipole is highly influenced by the High-[kappa] material in contact with the SiO@@d2@. Moreover, we also demonstrate its strong dependence on the process conditions. Finally, for a same metal gate and depending on the High-[kappa] in contact with SiO@@d2@, we show that this dipole can induce up to 1.7 eV variation in the gate effective work function. However, controlling the dipole magnitude remains a strong issue especially for the thinnest EOT.