CMOS low-dropout regulator with 3.3muA quiescent current without off-chip capacitor

A CMOS (complementary metal-oxide-semiconductor transistor) low-dropout regulator (LDO) with 3.3 V output voltage and 100 mA output current for system-on-chip applications to reduce board space and external pins is presented. By utilizing a dynamic slew-rate enhancement (SRE) circuit and nested Miller compensation (NMC) on the LDO structure, the proposed LDO provides high stability during line and load regulation without off-chip load capacitors. The overshot voltage is limited within 550 mV and the settling time is less than 50mus when the load current decreases from 100 mA to 1 mA. By using a 30 nA reference current, the quiescent current is 3.3muA. The proposed design is implemented by CSMC 0.5mum mixed-signal process. The experimental results agree with the simulation results. Copyright.