Effect of Si capping layer on the interface quality and NBTI of high mobility channel Ge-on-Si pMOSFETs

The effects of a Si capping layer on the device characteristics and negative bias temperature instability (NBTI) reliability were investigated for Ge-on-Si pMOSFETs. A Ge pMOSFET with a Si cap shows a lower subthreshold slope (SS), higher transconductance ( G m) and enhanced drive current. In additi...

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Veröffentlicht in:Microelectronic engineering 2009-03, Vol.86 (3), p.259-262
Hauptverfasser: Yoo, Ook Sang, Oh, Jungwoo, Min, Kyung Seok, Kang, Chang Yong, Lee, B.H., Lee, Kyong Taek, Na, Min Ki, Kwon, Hyuk-Min, Majhi, P., Tseng, H-H, Jammy, Raj, Wang, J.S., Lee, Hi-Deok
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Sprache:eng
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Zusammenfassung:The effects of a Si capping layer on the device characteristics and negative bias temperature instability (NBTI) reliability were investigated for Ge-on-Si pMOSFETs. A Ge pMOSFET with a Si cap shows a lower subthreshold slope (SS), higher transconductance ( G m) and enhanced drive current. In addition, lower threshold voltage shift and G m,max degradation are observed during NBTI stress. The primary reason for these characteristics is attributed to the improved interface quality at the high- k dielectric/substrate interface. Charge pumping was used to verify the presence of lower density of states in Ge pMOSFETs with a Si cap.
ISSN:0167-9317
1873-5568
DOI:10.1016/j.mee.2008.04.024