Write Current Reduction in Transition Metal Oxide Based Resistance Change Memory

A novel memory cell structure with a Pt/Ti‐doped NiO/Pt architecture is shown to exhibit the lowest write current reported thus far for a unipolar switching resistance‐change‐based device, as shown in the figure. The write current decreases dramatically upon scaling to cell sizes smaller than 100 nm...

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Veröffentlicht in:Advanced materials (Weinheim) 2008-03, Vol.20 (5), p.924-928
Hauptverfasser: Ahn, S.-E., Lee, M.-J., Park, Y., Kang, B. S., Lee, C. B., Kim, K. H., Seo, S., Suh, D.-S., Kim, D.-C., Hur, J., Xianyu, W., Stefanovich, G., Yin, H., Yoo, I.-K., Lee, J.-H., Park, J.-B., Baek, I.-G., Park, B. H.
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Sprache:eng
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Zusammenfassung:A novel memory cell structure with a Pt/Ti‐doped NiO/Pt architecture is shown to exhibit the lowest write current reported thus far for a unipolar switching resistance‐change‐based device, as shown in the figure. The write current decreases dramatically upon scaling to cell sizes smaller than 100 nm×100 nm. High‐density universal memory can be fabricated by combining this node element with a selective switch.
ISSN:0935-9648
1521-4095
DOI:10.1002/adma.200702081