A new model of an inverse sine phase detector to design ISPD PLL demodulator without using any filters

This paper describes the design of the Inverse Sine Phase Detector (ISPD) by utilizing a new model more effective than the existing model in precision, simplicity, robustness, for use in the ISPD PLL Demodulator without using any filters. As the high frequency, the large bandwidth, the wide capture range and seizure range, the faster lockup time, and the perfect reconstruction of an input signal in the output demodulator, are of primary concern in the whole design. The development and the synthesis of the ISPD cell, based on the new model, show that a class of circuits in the voltage domain such as a multiplier, a square rooter, and adder, which can be used to realize an inverse sine function circuit. The circuit was simulated in a CMOS 0.35 μ m process technology. The ISPD PLL demodulator without using any filters was used to cover the UMTS/IMT2000.