Temperature and drain voltage dependence of gate-induced drain leakage

The aim of this paper is to develop a simple and accurate model of the gate induced drain leakage (GIDL) of MOSFET's that can be easily implemented in a circuit simulator. We use an analytical expression of band-to-band tunneling in the case of trap-free gate oxide. The dependence of the GIDL current with temperature and with the drain potential is studded and modeled in the case of a n-MOS transistor. A methodology of parameter extraction is proposed.