The impact of scaling on metal thickness for advanced back end of line interconnects

In this paper, a universal model to predict the amount of allowable metal thinning for the control of copper chemical–mechanical polishing (CMP) is presented. In the model, all the non-planarity, like dishing and erosion, resulted from the copper CMP process, is assumed accumulative. This amount after a certain levels of wiring should never be greater than the thickness of a single wiring level. Otherwise the circuit connections will be failure, since the metal is not at the right position. Based on this criterion, an equation is derived and the percentage of allowable metal thinning to the metal thickness is defined as F MT. The calculated F MT for the 180, 130, 90, 65 and 45 nm generations are 15%, 10%, 9%, 8%, and 7%, respectively. For the 130 and 90 nm generations, these numbers are close to the guidance of 10% recommended in the 2003 International Technology Roadmap for Semiconductors (ITRS). However, for the 65 nm and the 45 nm generations, the calculated F MT factors are smaller than that in the roadmap, suggesting that tighter copper CMP process control is required in the future generations.