Low temperature spike anneal for Ni-silicide formation

Excessive Ni-silicide formation is observed at the edges of poly gates and source/drain lines. The excessive silicidation results in locally completely silicided poly gates and in very high junction leakage in small source/drain islands. It was studied whether the excessive Ni-silicide formation in...

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Veröffentlicht in:Microelectronic engineering 2004-10, Vol.76 (1-4), p.303-310
Hauptverfasser: Lauwers, A., Kittl, J.A., Van Dal, M., Chamirian, O., Lindsay, R., de Potter, M., Demeurisse, C., Vrancken, C., Maex, K., Pagès, X., Van der Jeugd, K., Kuznetsov, V., Granneman, E.
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Sprache:eng
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Zusammenfassung:Excessive Ni-silicide formation is observed at the edges of poly gates and source/drain lines. The excessive silicidation results in locally completely silicided poly gates and in very high junction leakage in small source/drain islands. It was studied whether the excessive Ni-silicide formation in narrow features can be reduced in a two-step Ni-silicide process in which the thermal budget of the first RTP step is just enough to fully react the Ni. It was found that the excessive silicidation can be avoided either by reducing the anneal temperature or by reducing the anneal time. Reducing the thermal budget of the first RTP step was found to significantly improve the junction leakage in small source/drain islands for As junctions. No improvement was observed for B junctions. The latter is thought to be related to the presence of NiSi2 pyramids.
ISSN:0167-9317
1873-5568
DOI:10.1016/j.mee.2004.07.048