High quality strained Si/SiGe substrates for CMOS and optical devices

Using LPCVD epitaxy on 200 mm standard wafers high quality strained Si/SiGe substrates (sSi/SiGe) based on a graded buffer approach have been developed. Physical and chemical analysis of the substrates, show an efficient amount of relaxation of the SiGe buffer and a fully strained silicon cap. Process integration of test devices into the sSi/SiGe layers was performed using a simply modified CMOS process. NMOS and PMOS transistors were integrated together with PIN diodes in a single sSi/SiGe substrate using the same process flow. Electrical measurements showed the enhancement of charge carrier mobility of up to 80% for electrons and 37% for holes compared to epitaxially grown silicon for reference. Also an enhanced photo responsivity at a wavelength of 1310 nm for PIN diodes integrated into the SiGe buffers was demonstrated. Low leakage currents of the PIN diodes conclude good crystal quality of the SiGe buffer layer.