High‐Performance Monolithic 3D Integrated Complementary Inverters Based on Monolayer n‐MoS2 and p‐WSe2
Herein, the structure of integrated M3D inverters are successfully demonstrated where a chemical vapor deposition (CVD) synthesized monolayer WSe2 p‐type nanosheet FET is vertically integrated on top of CVD synthesized monolayer MoS2 n‐type film FET arrays (2.5 × 2.5 cm) by semiconductor industry te...
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creator | Liu, Ming‐Jin Lan, Wei‐Jie Huang, Cai‐Syuan Chen, Chang‐Zhi Cyu, Ruei‐Hong Sino, Paul Albert L. Yang, Yu‐Lun Chiu, Po‐Wen Chuang, Feng‐Chuan Shen, Chang‐Hong Chen, Jyun‐Hong Chueh, Yu‐Lun |
description | Herein, the structure of integrated M3D inverters are successfully demonstrated where a chemical vapor deposition (CVD) synthesized monolayer WSe2 p‐type nanosheet FET is vertically integrated on top of CVD synthesized monolayer MoS2 n‐type film FET arrays (2.5 × 2.5 cm) by semiconductor industry techniques, such as transfer, e‐beam evaporation (EBV), and plasma etching processes. A low temperature (below 250 °C) is employed to protect the WSe2 and MoS2 channel materials from thermal decomposition during the whole fabrication process. The MoS2 NMOS and WSe2 PMOS device fabricated show an on/off current ratio exceeding 106 and the integrated M3D inverters indicate an average voltage gain of ≈9 at VDD = 2 V. In addition, the integrated M3D inverter demonstrates an ultra‐low power consumption of 0.112 nW at a VDD of 1 V. Statistical analysis of the fabricated inverters devices shows their high reliability, rendering them suitable for large‐area applications. The successful demonstration of M3D inverters based on large‐scale 2D monolayer TMDs indicate their high potential for advancing the application of 2D TMDs in future integrated circuits.
Herein, the structure of the integrated M3D inverters where a CVD‐synthesized monolayer WSe2 p‐type nanosheet FET is vertically integrated on top of CVD synthesized monolayer MoS2 n‐type film FET arrays is realized. The integrated M3D inverters show an average voltage gain of approximately 9 at VDD = 2 V with an ultra‐low power consumption of 0.112 nW at a VDD of 1 V. |
doi_str_mv | 10.1002/smll.202307728 |
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Herein, the structure of the integrated M3D inverters where a CVD‐synthesized monolayer WSe2 p‐type nanosheet FET is vertically integrated on top of CVD synthesized monolayer MoS2 n‐type film FET arrays is realized. The integrated M3D inverters show an average voltage gain of approximately 9 at VDD = 2 V with an ultra‐low power consumption of 0.112 nW at a VDD of 1 V.</description><identifier>ISSN: 1613-6810</identifier><identifier>EISSN: 1613-6829</identifier><identifier>DOI: 10.1002/smll.202307728</identifier><language>eng</language><publisher>Weinheim: Wiley Subscription Services, Inc</publisher><subject>2D TMDs ; Chemical synthesis ; Chemical vapor deposition ; Integrated circuits ; Inverters ; Low temperature ; Molybdenum disulfide ; Monolayers ; monolithic 3D ; MOS devices ; MoS2 ; Plasma etching ; Power consumption ; Statistical analysis ; Thermal decomposition ; Voltage gain ; WSe2</subject><ispartof>Small (Weinheim an der Bergstrasse, Germany), 2024-04, Vol.20 (17), p.e2307728-n/a</ispartof><rights>2024 Wiley‐VCH GmbH</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><orcidid>0000-0002-0155-9987</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://onlinelibrary.wiley.com/doi/pdf/10.1002%2Fsmll.202307728$$EPDF$$P50$$Gwiley$$H</linktopdf><linktohtml>$$Uhttps://onlinelibrary.wiley.com/doi/full/10.1002%2Fsmll.202307728$$EHTML$$P50$$Gwiley$$H</linktohtml><link.rule.ids>314,777,781,1412,27905,27906,45555,45556</link.rule.ids></links><search><creatorcontrib>Liu, Ming‐Jin</creatorcontrib><creatorcontrib>Lan, Wei‐Jie</creatorcontrib><creatorcontrib>Huang, Cai‐Syuan</creatorcontrib><creatorcontrib>Chen, Chang‐Zhi</creatorcontrib><creatorcontrib>Cyu, Ruei‐Hong</creatorcontrib><creatorcontrib>Sino, Paul Albert L.</creatorcontrib><creatorcontrib>Yang, Yu‐Lun</creatorcontrib><creatorcontrib>Chiu, Po‐Wen</creatorcontrib><creatorcontrib>Chuang, Feng‐Chuan</creatorcontrib><creatorcontrib>Shen, Chang‐Hong</creatorcontrib><creatorcontrib>Chen, Jyun‐Hong</creatorcontrib><creatorcontrib>Chueh, Yu‐Lun</creatorcontrib><title>High‐Performance Monolithic 3D Integrated Complementary Inverters Based on Monolayer n‐MoS2 and p‐WSe2</title><title>Small (Weinheim an der Bergstrasse, Germany)</title><description>Herein, the structure of integrated M3D inverters are successfully demonstrated where a chemical vapor deposition (CVD) synthesized monolayer WSe2 p‐type nanosheet FET is vertically integrated on top of CVD synthesized monolayer MoS2 n‐type film FET arrays (2.5 × 2.5 cm) by semiconductor industry techniques, such as transfer, e‐beam evaporation (EBV), and plasma etching processes. A low temperature (below 250 °C) is employed to protect the WSe2 and MoS2 channel materials from thermal decomposition during the whole fabrication process. The MoS2 NMOS and WSe2 PMOS device fabricated show an on/off current ratio exceeding 106 and the integrated M3D inverters indicate an average voltage gain of ≈9 at VDD = 2 V. In addition, the integrated M3D inverter demonstrates an ultra‐low power consumption of 0.112 nW at a VDD of 1 V. Statistical analysis of the fabricated inverters devices shows their high reliability, rendering them suitable for large‐area applications. The successful demonstration of M3D inverters based on large‐scale 2D monolayer TMDs indicate their high potential for advancing the application of 2D TMDs in future integrated circuits.
Herein, the structure of the integrated M3D inverters where a CVD‐synthesized monolayer WSe2 p‐type nanosheet FET is vertically integrated on top of CVD synthesized monolayer MoS2 n‐type film FET arrays is realized. The integrated M3D inverters show an average voltage gain of approximately 9 at VDD = 2 V with an ultra‐low power consumption of 0.112 nW at a VDD of 1 V.</description><subject>2D TMDs</subject><subject>Chemical synthesis</subject><subject>Chemical vapor deposition</subject><subject>Integrated circuits</subject><subject>Inverters</subject><subject>Low temperature</subject><subject>Molybdenum disulfide</subject><subject>Monolayers</subject><subject>monolithic 3D</subject><subject>MOS devices</subject><subject>MoS2</subject><subject>Plasma etching</subject><subject>Power consumption</subject><subject>Statistical analysis</subject><subject>Thermal decomposition</subject><subject>Voltage gain</subject><subject>WSe2</subject><issn>1613-6810</issn><issn>1613-6829</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2024</creationdate><recordtype>article</recordtype><recordid>eNpdkLtOwzAUhiMEElBYmSOxsLT4ksb2COXSSq1AKojRcpyTNpVjBzsFdeMReEaeBFdFHZjO5f_Pr6MvSS4wGmCEyHVojBkQRChijPCD5ATnmPZzTsThvsfoODkNYYUQxSRjJ4kZ14vlz9f3M_jK-UZZDenMWWfqblnrlN6lE9vBwqsOynTkmtZAA7ZTfhOFD_Ad-JDeqhBVZ3eXagM-tTFz5uYkVbZM2zi8zYGcJUeVMgHO_2oveX24fxmN-9Onx8noZtpvSZ7zflVQDAgypnQmiMiKXKCirLjWiA9FVbCK4aHGJWOCxW3J8oJjSoagWcY1yWkvudrltt69ryF0sqmDBmOUBbcOkgjMsRBc4Gi9_GddubW38TtJUTYUSGQcRZfYuT5rAxvZ-rqJBCRGcktebsnLPXk5n02n-4n-ApIQfGE</recordid><startdate>20240401</startdate><enddate>20240401</enddate><creator>Liu, Ming‐Jin</creator><creator>Lan, Wei‐Jie</creator><creator>Huang, Cai‐Syuan</creator><creator>Chen, Chang‐Zhi</creator><creator>Cyu, Ruei‐Hong</creator><creator>Sino, Paul Albert L.</creator><creator>Yang, Yu‐Lun</creator><creator>Chiu, Po‐Wen</creator><creator>Chuang, Feng‐Chuan</creator><creator>Shen, Chang‐Hong</creator><creator>Chen, Jyun‐Hong</creator><creator>Chueh, Yu‐Lun</creator><general>Wiley Subscription Services, Inc</general><scope>7SR</scope><scope>7U5</scope><scope>8BQ</scope><scope>8FD</scope><scope>JG9</scope><scope>L7M</scope><scope>7X8</scope><orcidid>https://orcid.org/0000-0002-0155-9987</orcidid></search><sort><creationdate>20240401</creationdate><title>High‐Performance Monolithic 3D Integrated Complementary Inverters Based on Monolayer n‐MoS2 and p‐WSe2</title><author>Liu, Ming‐Jin ; Lan, Wei‐Jie ; Huang, Cai‐Syuan ; Chen, Chang‐Zhi ; Cyu, Ruei‐Hong ; Sino, Paul Albert L. ; Yang, Yu‐Lun ; Chiu, Po‐Wen ; Chuang, Feng‐Chuan ; Shen, Chang‐Hong ; Chen, Jyun‐Hong ; Chueh, Yu‐Lun</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-p2668-fb31e0e47ac49294b690bdf8cc0859fb7f715c1d7797f8cd76b81325ec748c263</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2024</creationdate><topic>2D TMDs</topic><topic>Chemical synthesis</topic><topic>Chemical vapor deposition</topic><topic>Integrated circuits</topic><topic>Inverters</topic><topic>Low temperature</topic><topic>Molybdenum disulfide</topic><topic>Monolayers</topic><topic>monolithic 3D</topic><topic>MOS devices</topic><topic>MoS2</topic><topic>Plasma etching</topic><topic>Power consumption</topic><topic>Statistical analysis</topic><topic>Thermal decomposition</topic><topic>Voltage gain</topic><topic>WSe2</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Liu, Ming‐Jin</creatorcontrib><creatorcontrib>Lan, Wei‐Jie</creatorcontrib><creatorcontrib>Huang, Cai‐Syuan</creatorcontrib><creatorcontrib>Chen, Chang‐Zhi</creatorcontrib><creatorcontrib>Cyu, Ruei‐Hong</creatorcontrib><creatorcontrib>Sino, Paul Albert L.</creatorcontrib><creatorcontrib>Yang, Yu‐Lun</creatorcontrib><creatorcontrib>Chiu, Po‐Wen</creatorcontrib><creatorcontrib>Chuang, Feng‐Chuan</creatorcontrib><creatorcontrib>Shen, Chang‐Hong</creatorcontrib><creatorcontrib>Chen, Jyun‐Hong</creatorcontrib><creatorcontrib>Chueh, Yu‐Lun</creatorcontrib><collection>Engineered Materials Abstracts</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>METADEX</collection><collection>Technology Research Database</collection><collection>Materials Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>MEDLINE - Academic</collection><jtitle>Small (Weinheim an der Bergstrasse, Germany)</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Liu, Ming‐Jin</au><au>Lan, Wei‐Jie</au><au>Huang, Cai‐Syuan</au><au>Chen, Chang‐Zhi</au><au>Cyu, Ruei‐Hong</au><au>Sino, Paul Albert L.</au><au>Yang, Yu‐Lun</au><au>Chiu, Po‐Wen</au><au>Chuang, Feng‐Chuan</au><au>Shen, Chang‐Hong</au><au>Chen, Jyun‐Hong</au><au>Chueh, Yu‐Lun</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>High‐Performance Monolithic 3D Integrated Complementary Inverters Based on Monolayer n‐MoS2 and p‐WSe2</atitle><jtitle>Small (Weinheim an der Bergstrasse, Germany)</jtitle><date>2024-04-01</date><risdate>2024</risdate><volume>20</volume><issue>17</issue><spage>e2307728</spage><epage>n/a</epage><pages>e2307728-n/a</pages><issn>1613-6810</issn><eissn>1613-6829</eissn><abstract>Herein, the structure of integrated M3D inverters are successfully demonstrated where a chemical vapor deposition (CVD) synthesized monolayer WSe2 p‐type nanosheet FET is vertically integrated on top of CVD synthesized monolayer MoS2 n‐type film FET arrays (2.5 × 2.5 cm) by semiconductor industry techniques, such as transfer, e‐beam evaporation (EBV), and plasma etching processes. A low temperature (below 250 °C) is employed to protect the WSe2 and MoS2 channel materials from thermal decomposition during the whole fabrication process. The MoS2 NMOS and WSe2 PMOS device fabricated show an on/off current ratio exceeding 106 and the integrated M3D inverters indicate an average voltage gain of ≈9 at VDD = 2 V. In addition, the integrated M3D inverter demonstrates an ultra‐low power consumption of 0.112 nW at a VDD of 1 V. Statistical analysis of the fabricated inverters devices shows their high reliability, rendering them suitable for large‐area applications. The successful demonstration of M3D inverters based on large‐scale 2D monolayer TMDs indicate their high potential for advancing the application of 2D TMDs in future integrated circuits.
Herein, the structure of the integrated M3D inverters where a CVD‐synthesized monolayer WSe2 p‐type nanosheet FET is vertically integrated on top of CVD synthesized monolayer MoS2 n‐type film FET arrays is realized. The integrated M3D inverters show an average voltage gain of approximately 9 at VDD = 2 V with an ultra‐low power consumption of 0.112 nW at a VDD of 1 V.</abstract><cop>Weinheim</cop><pub>Wiley Subscription Services, Inc</pub><doi>10.1002/smll.202307728</doi><tpages>8</tpages><orcidid>https://orcid.org/0000-0002-0155-9987</orcidid></addata></record> |
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subjects | 2D TMDs Chemical synthesis Chemical vapor deposition Integrated circuits Inverters Low temperature Molybdenum disulfide Monolayers monolithic 3D MOS devices MoS2 Plasma etching Power consumption Statistical analysis Thermal decomposition Voltage gain WSe2 |
title | High‐Performance Monolithic 3D Integrated Complementary Inverters Based on Monolayer n‐MoS2 and p‐WSe2 |
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