The fabrication and characterization of EEPROM arrays on glass using a low-temperature poly-Si TFT process

The fabrication and characterization of EEPROM arrays on glass using a low-temperature poly-Si TFT process

The fabrication and optimization of poly-Si thin-film transistors and memory devices on glass substrates at temperatures of 200/spl deg/C-400/spl deg/C is described, and the device characteristics and stability are discussed. The devices were formed using PECVD amorphous silicon, silicon dioxide, an...

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Veröffentlicht in:IEEE transactions on electron devices 1996-11, Vol.43 (11), p.1930-1936
Hauptverfasser: Young, N.D., Harkin, G., Bunn, R.M., McCulloch, D.J., French, I.D.
Format: Artikel
Sprache:eng
Schlagworte:
Amorphous silicon
Circuit stability
EPROM
Fabrication
Glass
Semiconductor films
Silicon compounds
Substrates
Temperature
Thin film transistors
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Zusammenfassung:The fabrication and optimization of poly-Si thin-film transistors and memory devices on glass substrates at temperatures of 200/spl deg/C-400/spl deg/C is described, and the device characteristics and stability are discussed. The devices were formed using PECVD amorphous silicon, silicon dioxide, and silicon nitride films, and the crystallization of the amorphous silicon was achieved with an excimer laser. The performance of 16/spl times/16 EEPROM arrays with integrated drive circuits formed using this technology is presented.
ISSN:0018-9383
1557-9646
DOI:10.1109/16.543029