Low Cost On-Line Testing Strategy for RF Circuits
Issue Title: Special Issue on On-Line-Testing and Fault Tolerance This work proposes the use of a simple 1-bit digitizer as an analog block observer, in order to enable the implementation of on-line test strategies for RF analog circuits in the System-on-Chip environment. The main advantages of usin...
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Veröffentlicht in: | Journal of electronic testing 2005-08, Vol.21 (4), p.417-427 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | Issue Title: Special Issue on On-Line-Testing and Fault Tolerance This work proposes the use of a simple 1-bit digitizer as an analog block observer, in order to enable the implementation of on-line test strategies for RF analog circuits in the System-on-Chip environment. The main advantages of using a simple digitizer for RF circuits are related to the increased observability of the RF signal path and minimum RF signal degradation, as neither reconfiguration of the signal path nor variable load for the analog RF circuit are introduced. As an additional advantage, the same digitizer can be used to implement BIST strategies, if required. The feasibility of using a 1-bit digitizer for the test of analog signals has already been presented in the literature for low frequency linear analog systems. This paper discusses the implementation of an on-line test strategy for analog RF circuits in the SoC environment, and presents new results for on-line RF testing. Moreover, we also provide detailed analysis regarding the overhead of the test strategy implementation. Experimental results illustrate the feasibility of the proposed technique.[PUBLICATION ABSTRACT] |
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ISSN: | 0923-8174 1573-0727 |
DOI: | 10.1007/s10836-005-1151-y |