The message-driven processor: a multicomputer processing node with efficient mechanisms
The message-driven processor (MDP), a 36-b, 1.1-million transistor, VLSI microcomputer, specialized to operate efficiently in a multicomputer, is described. The MDP chip includes a processor, a 4096-word by 36-b memory, and a network port. An on-chip memory controller with error checking and correct...
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| Veröffentlicht in: | IEEE MICRO 1992-04, Vol.12 (2), p.23-39 |
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| container_title | IEEE MICRO |
| container_volume | 12 |
| creator | Dally, W.J. Fiske, J.A.S. Keen, J.S. Lethin, R.A. Noakes, M.D. Nuth, P.R. Davison, R.E. Fyler, G.A. |
| description | The message-driven processor (MDP), a 36-b, 1.1-million transistor, VLSI microcomputer, specialized to operate efficiently in a multicomputer, is described. The MDP chip includes a processor, a 4096-word by 36-b memory, and a network port. An on-chip memory controller with error checking and correction (ECC) permits local memory to be expanded to one million words by adding external DRAM chips. The MDP incorporates primitive mechanisms for communication, synchronization, and naming which support most proposed parallel programming models. The MDP system architecture, instruction set architecture, network architecture, implementation, and software are discussed.< > |
| doi_str_mv | 10.1109/40.127581 |
| format | Article |
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The MDP system architecture, instruction set architecture, network architecture, implementation, and software are discussed.< ></description><subject>Computational modeling</subject><subject>Computer errors</subject><subject>Computer networks</subject><subject>Concurrent computing</subject><subject>Error correction</subject><subject>Error correction codes</subject><subject>Hardware</subject><subject>Parallel processing</subject><subject>Parallel programming</subject><subject>Very large scale integration</subject><issn>0272-1732</issn><issn>1937-4143</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1992</creationdate><recordtype>article</recordtype><recordid>eNpFkEtLxDAUhYMoOI4u3LrKSnBRzbNp3cngCwbcjLgsaXIzjfQxJq3ivzdaxdUH93wcLgehU0ouKSXllUhkShZ0Dy1oyVUmqOD7aEGYYhlVnB2ioxhfCSGSkWKBXjYN4A5i1FvIbPDv0ONdGEy6DOEaa9xN7ejN0O2mEcJf5Pst7gcL-MOPDQbnvPHQj6nINLr3sYvH6MDpNsLJL5fo-e52s3rI1k_3j6ubdWaYUmMmjKyZzokmpVBKEq4spbkmljlbMmFszYEIypiW1tXaitppSaTJLS-FNIwv0fncmz57myCOVeejgbbVPQxTrFhR5IpJlcSLWTRhiDGAq3bBdzp8VpRU39NVIvFnuuSeza4HgH9vDr8AV2BqOg</recordid><startdate>199204</startdate><enddate>199204</enddate><creator>Dally, W.J.</creator><creator>Fiske, J.A.S.</creator><creator>Keen, J.S.</creator><creator>Lethin, R.A.</creator><creator>Noakes, M.D.</creator><creator>Nuth, P.R.</creator><creator>Davison, R.E.</creator><creator>Fyler, G.A.</creator><general>IEEE</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>7SP</scope><scope>7U5</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope></search><sort><creationdate>199204</creationdate><title>The message-driven processor: a multicomputer processing node with efficient mechanisms</title><author>Dally, W.J. ; Fiske, J.A.S. ; Keen, J.S. ; Lethin, R.A. ; Noakes, M.D. ; Nuth, P.R. ; Davison, R.E. ; Fyler, G.A.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c277t-4c5b2a60a094775037d116a0d2fd924cdb3e04122a5dfbad4bfa505c6d3945c23</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1992</creationdate><topic>Computational modeling</topic><topic>Computer errors</topic><topic>Computer networks</topic><topic>Concurrent computing</topic><topic>Error correction</topic><topic>Error correction codes</topic><topic>Hardware</topic><topic>Parallel processing</topic><topic>Parallel programming</topic><topic>Very large scale integration</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Dally, W.J.</creatorcontrib><creatorcontrib>Fiske, J.A.S.</creatorcontrib><creatorcontrib>Keen, J.S.</creatorcontrib><creatorcontrib>Lethin, R.A.</creatorcontrib><creatorcontrib>Noakes, M.D.</creatorcontrib><creatorcontrib>Nuth, P.R.</creatorcontrib><creatorcontrib>Davison, R.E.</creatorcontrib><creatorcontrib>Fyler, G.A.</creatorcontrib><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Electronics & Communications Abstracts</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><jtitle>IEEE MICRO</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Dally, W.J.</au><au>Fiske, J.A.S.</au><au>Keen, J.S.</au><au>Lethin, R.A.</au><au>Noakes, M.D.</au><au>Nuth, P.R.</au><au>Davison, R.E.</au><au>Fyler, G.A.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>The message-driven processor: a multicomputer processing node with efficient mechanisms</atitle><jtitle>IEEE MICRO</jtitle><stitle>MM</stitle><date>1992-04</date><risdate>1992</risdate><volume>12</volume><issue>2</issue><spage>23</spage><epage>39</epage><pages>23-39</pages><issn>0272-1732</issn><eissn>1937-4143</eissn><coden>IEMIDZ</coden><abstract>The message-driven processor (MDP), a 36-b, 1.1-million transistor, VLSI microcomputer, specialized to operate efficiently in a multicomputer, is described. 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| ispartof | IEEE MICRO, 1992-04, Vol.12 (2), p.23-39 |
| issn | 0272-1732 1937-4143 |
| language | eng |
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| source | IEEE Electronic Library (IEL) |
| subjects | Computational modeling Computer errors Computer networks Concurrent computing Error correction Error correction codes Hardware Parallel processing Parallel programming Very large scale integration |
| title | The message-driven processor: a multicomputer processing node with efficient mechanisms |
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