A 4K CMOS erasable PROM
A high performance ultraviolet erasable complementary MOS PROM is described. Microwatt standby power is achieved by utilizing synchronous design on an ion-implanted silicon-gate CMOS technology. The device can operate with a single voltage supply from 4 to 11 V while still maintaining TTL compatibil...
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Veröffentlicht in: | IEEE journal of solid-state circuits 1978-10, Vol.13 (5), p.677-680 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | A high performance ultraviolet erasable complementary MOS PROM is described. Microwatt standby power is achieved by utilizing synchronous design on an ion-implanted silicon-gate CMOS technology. The device can operate with a single voltage supply from 4 to 11 V while still maintaining TTL compatibility on all address inputs, or with two supplies allowing under 200 ns access time with both TTL compatible address and output levels. On-chip address latches and high noise immunity are some of the other features that would simplify system design using the CMOS EPROM. Programming is by avalanche injection of electrons into selected floating gates. Single-location programming and high programming duty cycle reduce programming time to less than 30 s per device. |
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ISSN: | 0018-9200 1558-173X |
DOI: | 10.1109/JSSC.1978.1051118 |