Electrical properties of B-doped polycrystalline silicon thin films prepared by rapid thermal chemical vapour deposition

In this paper, about 30 μm thick B-doped polycrystalline silicon (poly-Si) thin films were deposited on quartz substrates, n-type single crystalline silicon wafers and p++-type poly-Si ribbons by a rapid thermal chemical vapour deposition system in a temperature range from 1000 to 1150 °C. Activation energy measurement and room temperature/temperature dependent Hall effect measurement were performed on the poly-Si thin films prepared on the former two kinds of substrates, respectively. It seems that the electrical properties of as-prepared poly-Si thin films could be qualitatively explained by Seto's grain boundary (GB) trapping theory although there is a big difference between our samples and Seto's in grain size and film thickness etc. The experimental results reconfirm that GB itself is a kind of most effective recombination center with trapping level near the midgap and trapping state density in the order of 1012 cm−2 magnitude. Electron beam induced current measurements on the poly-Si thin films prepared on the poly-Si ribbons also show that severe recombination occurs at the positions of GBs.