Wafer-level radiation testing for hardness assurance

To implement the qualified manufacturers list (QML) approach to hardness assurance in a practical and cost-effective manner, one must identify technology parameters that affect radiation hardness and bring them under statistical process control. To aid this effort, the authors have developed a wafer-level test system to map test-structure and IC response across a wafer. This system permits current-voltage and charge-pumping measurements on transistors, and high-frequency capacitance-voltage measurements on capacitors. For frequencies up to 50 MHz, the system provides a complete menu of functional and parametric IC tests. Wafer maps and histograms of test-structure and IC response are presented for a 1.2- mu m radiation-hardened CMOS technology to illustrate the capabilities of the wafer-level test system. Statistical and deterministic approaches to correlate test structure and IC response are discussed for this technology.< >