Test structures for evaluating strong phase shift lithography

Test structures are presented for the evaluation of phase shift lithography on the gate level of a CMOS technology. The structures address the measurement of phase shift printed linewidth, the evaluation of transistors as a function of phase shifter geometry, and the detection of misalignment of con...

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Veröffentlicht in:IEEE transactions on semiconductor manufacturing 2002-05, Vol.15 (2), p.195-200
Hauptverfasser: Ashton, R.A., Kane, B.C., Blatchford, J.W., Shuttleworth, D.M.
Format: Artikel
Sprache:eng
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Zusammenfassung:Test structures are presented for the evaluation of phase shift lithography on the gate level of a CMOS technology. The structures address the measurement of phase shift printed linewidth, the evaluation of transistors as a function of phase shifter geometry, and the detection of misalignment of contact windows to the phase shift printed gate.
ISSN:0894-6507
1558-2345
DOI:10.1109/66.999592