The complexity of generating minimum test sets for PLA's and monotone combinational circuits

The complexity of generating minimum test sets for PLA's and monotone combinational circuits

The authors show that the problem of obtaining a minimum complete test set is NP-complete for monotone PLAs even when each product term of the PLA contains at most two literals. Using the ideas developed in the proof of this result, they resolve an open question due to B. Krishnamurthy and S.B. Aker...

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Veröffentlicht in:IEEE transactions on computers 1989-06, Vol.38 (6), p.865-869
Hauptverfasser: Chakravarty, S., Hunt, H.B., Ravi, S.S., Rosenkrantz, D.J.
Format: Artikel
Sprache:eng
Schlagworte:
Applied sciences
Circuit faults
Circuit properties
Circuit testing
Combinational circuits
Computer science
Digital circuits
Electric, optical and optoelectronic circuits
Electronic circuits
Electronics
Exact sciences and technology
Fault detection
Logic functions
NP-hard problem
Polynomials
Programmable logic arrays
Very large scale integration
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Beschreibung
Zusammenfassung:The authors show that the problem of obtaining a minimum complete test set is NP-complete for monotone PLAs even when each product term of the PLA contains at most two literals. Using the ideas developed in the proof of this result, they resolve an open question due to B. Krishnamurthy and S.B. Akers (1984). The authors also show that given a complete test set T, the problem of obtaining a minimum test set contained in T is NP-complete even for two-level monotone circuits.< >
ISSN:0018-9340
1557-9956
DOI:10.1109/12.24296