Synonym hit RAM - a 500-MHz CMOS SRAM macro with 576-bit parallel comparison and parity check functions

A 1.5-ns-access 500-MHz synonym hit RAM has been developed using 0.25-/spl mu/m CMOS technology, which is the macro-cell to be used in microprocessor chips. We have proposed a virtual cache system with a synonym hit RAM, which achieves both high speed and large capacity because it solves the synonym...

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Veröffentlicht in:IEEE journal of solid-state circuits 2000-02, Vol.35 (2), p.163-174
Hauptverfasser: Suzuki, T., Higeta, K., Fujimura, Y., Ando, K., Nambu, H., Yamagata, R., Hotta, A., Yamaguchi, K.
Format: Artikel
Sprache:eng
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Zusammenfassung:A 1.5-ns-access 500-MHz synonym hit RAM has been developed using 0.25-/spl mu/m CMOS technology, which is the macro-cell to be used in microprocessor chips. We have proposed a virtual cache system with a synonym hit RAM, which achieves both high speed and large capacity because it solves the synonym problem that occurs with large-capacity cache systems. In this system, the RAM macro needs 576-bit parallel comparison and parity check functions. The configuration used achieves testability and low-power dissipation of large 576-bit data output. Moreover, the dynamic-NOR with a dynamic-inverter and sense-amplifier activation pulse generator are essential for reducing the comparison delay.
ISSN:0018-9200
1558-173X
DOI:10.1109/4.823442